Lines Matching defs:sc
70 ar8316_hw_setup(struct arswitch_softc *sc)
79 if (sc->is_rgmii && sc->phy4cpu) {
80 arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
82 device_printf(sc->sc_dev,
85 } else if (sc->is_rgmii) {
86 arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
88 device_printf(sc->sc_dev,
91 } else if (sc->is_gmii) {
92 arswitch_writereg(sc->sc_dev, AR8X16_REG_MODE,
94 device_printf(sc->sc_dev, "%s: MAC port == GMII\n", __func__);
96 device_printf(sc->sc_dev, "%s: unknown switch PHY config\n",
106 if (sc->is_rgmii && sc->phy4cpu) {
107 device_printf(sc->sc_dev,
112 arswitch_writedbg(sc->sc_dev, 4, 0x12, 0x480c);
114 arswitch_writedbg(sc->sc_dev, 4, 0x0, 0x824e);
116 arswitch_writedbg(sc->sc_dev, 4, 0x5, 0x3d47);
127 ar8316_hw_global_setup(struct arswitch_softc *sc)
130 arswitch_writereg(sc->sc_dev, 0x38, AR8X16_MAGIC);
133 arswitch_writereg(sc->sc_dev, AR8X16_REG_CPU_PORT,
137 arswitch_writereg(sc->sc_dev, AR8X16_REG_TAG_PRIO, 0xfa50);
141 arswitch_modifyreg(sc->sc_dev, AR8X16_REG_AT_CTRL, 0,
148 arswitch_writereg(sc->sc_dev, AR8X16_REG_FLOOD_MASK,
152 arswitch_modifyreg(sc->sc_dev, AR8X16_REG_GLOBAL_CTRL,
156 arswitch_modifyreg(sc->sc_dev, AR8X16_REG_SERVICE_TAG,
163 ar8316_attach(struct arswitch_softc *sc)
166 sc->hal.arswitch_hw_setup = ar8316_hw_setup;
167 sc->hal.arswitch_hw_global_setup = ar8316_hw_global_setup;
170 sc->info.es_vlan_caps = ETHERSWITCH_VLAN_DOT1Q |
172 sc->info.es_nvlangroups = AR8X16_MAX_VLANS;