dev/cxgbe/t4_sge.c

1504 			if (__predict_false(++iq->cidx == iq->sidx)) {
1609 			refill = IDXDIFF(fl->hw_cidx, fl_hw_cidx, fl->sidx) > 2;
1658 		if (__predict_false(++iq->cidx == iq->sidx)) {
1862 		if (__predict_false(cidx == fl->sidx))
1895 			if (__predict_false(cidx == fl->sidx))
2034 			available = eq->sidx - 1;
2036 			available = IDXDIFF(eq->cidx, eq->pidx, eq->sidx) - 1;
2044 		if (__predict_true(eq->sidx - eq->pidx > n)) {
2049 			int first_portion = (eq->sidx - eq->pidx) * EQ_ESIZE;
2056 			eq->pidx = n - (eq->sidx - eq->pidx);
2060 		if (available < eq->sidx / 4 &&
2426 		available = eq->sidx - 1;
2428 		available = IDXDIFF(eq->cidx, eq->pidx, eq->sidx) - 1;
2437 	IDXINCR(eq->pidx, ndesc, eq->sidx);
2438 	if (__predict_false(cookie->pidx + ndesc > eq->sidx)) {
2465 		int n = (eq->sidx - wrq->ss_pidx) * EQ_ESIZE;
2477 	MPASS(pidx >= 0 && pidx < eq->sidx);
2492 			available = IDXDIFF(eq->cidx, eq->pidx, eq->sidx) - 1;
2493 			if (available < eq->sidx / 4 &&
2506 			MPASS(IDXDIFF(next->pidx, pidx, eq->sidx) == ndesc);
2511 		MPASS(IDXDIFF(pidx, prev->pidx, eq->sidx) == prev->ndesc);
2533 	return (total_available_tx_desc(eq) > eq->sidx / 8);
2590 		available = eq->sidx - 1;
2592 		available = IDXDIFF(eq->cidx, eq->pidx, eq->sidx) - 1;
2593 	dbdiff = IDXDIFF(eq->pidx, eq->dbidx, eq->sidx);
2656 		IDXINCR(eq->pidx, n, eq->sidx);
2658 		if (total_available_tx_desc(eq) < eq->sidx / 4 &&
2663 		} else if (IDXDIFF(eq->pidx, eq->equeqidx, eq->sidx) >= 32) {
2705 	iq->sidx = iq->qsize - sc->params.sge.spg_len / IQ_ESIZE;
2713 	fl->sidx = qsize - sc->params.sge.spg_len / EQ_ESIZE;
2732 	eq->sidx = qsize - sc->params.sge.spg_len / EQ_ESIZE;
3065 	    fl->sidx * EQ_ESIZE + sc->params.sge.spg_len,
3387 	nm_txq->sidx = na->num_tx_desc;
3445 	int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
3491 	int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
3538 	int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
3586 	qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
3713 	    wrq->eq.sidx * EQ_ESIZE + sc->params.sge.spg_len,
3723 	SYSCTL_ADD_INT(ctx, children, OID_AUTO, "sidx", CTLFLAG_RD, NULL,
3724 	    wrq->eq.sidx, "status page index");
3759 	rc = mp_ring_alloc(&txq->r, eq->sidx, txq, eth_tx, can_resume_eth_tx,
3794 	txq->sdesc = malloc(eq->sidx * sizeof(struct tx_sdesc), M_CXGBE,
3805 	    eq->sidx * EQ_ESIZE + sc->params.sge.spg_len,
3817 	SYSCTL_ADD_INT(&vi->ctx, children, OID_AUTO, "sidx", CTLFLAG_RD, NULL,
3818 	    eq->sidx, "status page index");
3907 	n = IDXDIFF(fl->pidx / 8, fl->dbidx, fl->sidx);
3916 	IDXINCR(fl->dbidx, n, fl->sidx);
3946 	max_pidx = __predict_false(hw_cidx == 0) ? fl->sidx - 1 : hw_cidx - 1;
4027 			if (__predict_false(pidx == fl->sidx)) {
4036 			if (IDXDIFF(pidx, fl->dbidx, fl->sidx) >= 4)
4075 	fl->sdesc = malloc(fl->sidx * 8 * sizeof(struct fl_sdesc), M_CXGBE,
4090 	for (i = 0; i < fl->sidx * 8; i++, sd++) {
4237 	MPASS(available > 0 && available < eq->sidx);
4379 	if (dst == (void *)&eq->desc[eq->sidx]) {
4383 		write_gl_to_txd(txq, m0, &dst, eq->sidx - ndesc < eq->pidx);
4416 	MPASS(available > 0 && available < eq->sidx);
4497 		write_gl_to_txd(txq, m0, &dst, eq->sidx - ndesc < eq->pidx);
4614 	MPASS(available > 0 && available < eq->sidx);
4634 	checkwrap = eq->sidx - ndesc < eq->pidx;
4654 			    (uintptr_t)cpl == (uintptr_t)&eq->desc[eq->sidx])
4685 		    (uintptr_t)flitp == (uintptr_t)&eq->desc[eq->sidx])
4724 	MPASS((uintptr_t)(*to) < (uintptr_t)&eq->desc[eq->sidx]);
4732 	wrap = (__be64 *)(&eq->desc[eq->sidx]);
4789 	MPASS((uintptr_t)(*to) < (uintptr_t)&eq->desc[eq->sidx]);
4792 	    (uintptr_t)&eq->desc[eq->sidx])) {
4796 		int portion = (uintptr_t)&eq->desc[eq->sidx] - (uintptr_t)(*to);
4857 	IDXINCR(eq->dbidx, n, eq->sidx);
4866 	return (IDXDIFF(hw_cidx, eq->cidx, eq->sidx));
4878 		return (eq->sidx - 1);
4880 		return (IDXDIFF(hw_cidx, pidx, eq->sidx) - 1);
4886 	struct sge_qstat *spg = (void *)&eq->desc[eq->sidx];
4929 		IDXINCR(eq->cidx, ndesc, eq->sidx);