Lines Matching refs:mac
39 static inline int macidx(const struct cmac *mac)
41 return mac->offset / (XGMAC0_1_BASE_ADDR - XGMAC0_0_BASE_ADDR);
45 * Returns a reasonable A_XGM_RESET_CTRL value for the mac specified.
47 static inline int xgm_reset_ctrl(const struct cmac *mac)
49 adapter_t *adap = mac->adapter;
53 int cfg = t3_read_reg(adap, A_XGM_PORT_CFG + mac->offset);
66 static void xaui_serdes_reset(struct cmac *mac)
74 adapter_t *adap = mac->adapter;
75 u32 ctrl = A_XGM_SERDES_CTRL0 + mac->offset;
77 t3_write_reg(adap, ctrl, adap->params.vpd.xauicfg[macidx(mac)] |
92 * @mac: the XGMAC handle
96 void t3b_pcs_reset(struct cmac *mac)
98 t3_set_reg_field(mac->adapter, A_XGM_RESET_CTRL + mac->offset,
103 t3_set_reg_field(mac->adapter, A_XGM_RESET_CTRL + mac->offset, 0,
107 void t3c_pcs_force_los(struct cmac *mac)
109 t3_set_reg_field(mac->adapter, A_XGM_SERDES_STAT0 + mac->offset,
112 t3_set_reg_field(mac->adapter, A_XGM_SERDES_STAT1 + mac->offset,
115 t3_set_reg_field(mac->adapter, A_XGM_SERDES_STAT2 + mac->offset,
118 t3_set_reg_field(mac->adapter, A_XGM_SERDES_STAT3 + mac->offset,
124 t3_set_reg_field(mac->adapter, A_XGM_SERDES_STAT0 + mac->offset,
126 t3_set_reg_field(mac->adapter, A_XGM_SERDES_STAT1 + mac->offset,
128 t3_set_reg_field(mac->adapter, A_XGM_SERDES_STAT2 + mac->offset,
130 t3_set_reg_field(mac->adapter, A_XGM_SERDES_STAT3 + mac->offset,
136 * @mac: the MAC to initialize
140 int t3_mac_init(struct cmac *mac)
160 adapter_t *adap = mac->adapter;
161 unsigned int oft = mac->offset;
180 macidx(mac));
186 xaui_serdes_reset(mac);
190 if (mac->multiport) {
208 val = xgm_reset_ctrl(mac);
213 t3b_pcs_reset(mac);
216 memset(&mac->stats, 0, sizeof(mac->stats));
220 static int t3_mac_reset(struct cmac *mac, int portspeed)
223 adapter_t *adap = mac->adapter;
224 unsigned int oft = mac->offset;
225 int idx = macidx(mac);
277 t3_mac_init(mac);
285 val = xgm_reset_ctrl(mac);
290 t3b_pcs_reset(mac);
314 static void set_addr_filter(struct cmac *mac, int idx, const u8 *addr)
317 unsigned int oft = mac->offset + idx * 8;
322 t3_write_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1 + oft, addr_lo);
323 t3_write_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_HIGH_1 + oft, addr_hi);
328 * @mac: the MAC handle
334 int t3_mac_set_address(struct cmac *mac, unsigned int idx, u8 addr[6])
336 if (mac->multiport)
337 idx = mac->ext_port + idx * mac->adapter->params.nports;
338 if (idx >= mac->nucast)
340 set_addr_filter(mac, idx, addr);
341 if (mac->multiport && idx < mac->adapter->params.nports)
342 t3_vsc7323_set_addr(mac->adapter, addr, idx);
348 * @mac: the MAC handle
358 int t3_mac_set_num_ucast(struct cmac *mac, unsigned char n)
362 mac->nucast = n;
366 void t3_mac_disable_exact_filters(struct cmac *mac)
368 unsigned int i, reg = mac->offset + A_XGM_RX_EXACT_MATCH_LOW_1;
371 u32 v = t3_read_reg(mac->adapter, reg);
372 t3_write_reg(mac->adapter, reg, v);
374 t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */
377 void t3_mac_enable_exact_filters(struct cmac *mac)
379 unsigned int i, reg = mac->offset + A_XGM_RX_EXACT_MATCH_HIGH_1;
382 u32 v = t3_read_reg(mac->adapter, reg);
383 t3_write_reg(mac->adapter, reg, v);
385 t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */
404 * @mac: the MAC to configure
410 int t3_mac_set_rx_mode(struct cmac *mac, struct t3_rx_mode *rm)
413 adapter_t *adap = mac->adapter;
414 unsigned int oft = mac->offset;
417 mac->promisc_map |= 1 << mac->ext_port;
419 mac->promisc_map &= ~(1 << mac->ext_port);
421 mac->promisc_map ? F_COPYALLFRAMES : 0);
423 if (allmulti_rx_mode(rm) || mac->multiport)
427 int exact_addr_idx = mac->nucast;
432 set_addr_filter(mac, exact_addr_idx++, addr);
458 * @mac: the MAC to configure
463 int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
468 adapter_t *adap = mac->adapter;
469 unsigned port_type = adap->params.vpd.port_type[macidx(mac)];
477 if (mac->multiport)
481 if (mac->multiport)
482 return t3_vsc7323_set_mtu(adap, mtu - 4, mac->ext_port);
486 int err = t3_vsc8211_fifo_depth(adap,orig_mtu,macidx(mac));
493 (t3_read_reg(adap, A_XGM_RX_CTRL + mac->offset) & F_RXEN)) {
494 t3_mac_disable_exact_filters(mac);
495 v = t3_read_reg(adap, A_XGM_RX_CFG + mac->offset);
496 t3_set_reg_field(adap, A_XGM_RX_CFG + mac->offset,
503 if (t3_wait_op_done(adap, reg + mac->offset,
505 t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v);
506 t3_mac_enable_exact_filters(mac);
509 t3_set_reg_field(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset,
512 t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v);
513 t3_mac_enable_exact_filters(mac);
515 t3_set_reg_field(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset,
524 v = t3_read_reg(adap, A_XGM_RXFIFO_CFG + mac->offset);
531 t3_write_reg(adap, A_XGM_RXFIFO_CFG + mac->offset, v);
541 t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + mac->offset,
549 * @mac: the MAC to configure
558 int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex, int fc)
561 adapter_t *adap = mac->adapter;
562 unsigned int oft = mac->offset;
569 t3_write_reg(adap, A_XGM_TX_PAUSE_QUANTA + mac->offset,
571 t3_write_reg(adap, A_XGM_PAUSE_TIMER + mac->offset,
574 if (mac->multiport) {
585 return t3_vsc7323_set_speed_fc(adap, speed, fc, mac->ext_port);
606 t3_mac_reset(mac, val);
607 mac->was_reset = 1;
629 * @mac: the MAC to configure
636 int t3_mac_enable(struct cmac *mac, int which)
638 int idx = macidx(mac);
639 adapter_t *adap = mac->adapter;
640 unsigned int oft = mac->offset;
641 struct mac_stats *s = &mac->stats;
643 if (mac->multiport)
644 return t3_vsc7323_enable(adap, mac->ext_port, which);
659 mac->tx_mcnt = s->tx_frames;
660 mac->tx_tcnt = (G_TXDROPCNTCH0RCVD(t3_read_reg(adap,
662 mac->tx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
665 mac->rx_mcnt = s->rx_frames;
666 mac->rx_pause = s->rx_pause;
667 mac->rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
670 mac->rx_ocnt = s->rx_fifo_ovfl;
671 mac->txen = F_TXEN;
672 mac->toggle_cnt = 0;
681 * @mac: the MAC to configure
688 int t3_mac_disable(struct cmac *mac, int which)
690 adapter_t *adap = mac->adapter;
692 if (mac->multiport)
693 return t3_vsc7323_disable(adap, mac->ext_port, which);
696 t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0);
697 mac->txen = 0;
700 int val = xgm_reset_ctrl(mac);
702 t3_set_reg_field(mac->adapter, A_XGM_RESET_CTRL + mac->offset,
705 t3_write_reg(adap, A_XGM_RX_CTRL + mac->offset, 0);
706 t3_write_reg(mac->adapter, A_XGM_RESET_CTRL + mac->offset, val);
711 int t3b2_mac_watchdog_task(struct cmac *mac)
715 adapter_t *adap = mac->adapter;
716 struct mac_stats *s = &mac->stats;
719 if (mac->multiport)
724 tx_tcnt = mac->tx_tcnt; /* If tx_mcnt is progressing ignore tx_tcnt*/
725 if (tx_mcnt == mac->tx_mcnt && mac->rx_pause == s->rx_pause) {
730 mac->offset)));
732 active = macidx(mac) ? cfg & F_PORT1ACTIVE : cfg & F_PORT0ACTIVE;
736 A_TP_TX_DROP_CNT_CH0 + macidx(mac));
743 mac->toggle_cnt = 0;
747 if ((tx_tcnt != mac->tx_tcnt) && (mac->tx_xcnt == 0)) {
748 if (mac->toggle_cnt > 4) {
756 mac->toggle_cnt = 0;
761 mac->tx_tcnt = tx_tcnt;
762 mac->tx_xcnt = tx_xcnt;
763 mac->tx_mcnt = s->tx_frames;
764 mac->rx_pause = s->rx_pause;
766 t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0);
767 t3_read_reg(adap, A_XGM_TX_CTRL + mac->offset); /* flush */
768 t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, mac->txen);
769 t3_read_reg(adap, A_XGM_TX_CTRL + mac->offset); /* flush */
770 mac->toggle_cnt++;
772 t3_mac_reset(mac, -1);
773 mac->toggle_cnt = 0;
780 * @mac: the MAC handle
788 const struct mac_stats *t3_mac_update_stats(struct cmac *mac)
790 #define RMON_READ(mac, addr) t3_read_reg(mac->adapter, addr + mac->offset)
791 #define RMON_UPDATE(mac, name, reg) \
792 (mac)->stats.name += (u64)RMON_READ(mac, A_XGM_STAT_##reg)
793 #define RMON_UPDATE64(mac, name, reg_lo, reg_hi) \
794 (mac)->stats.name += RMON_READ(mac, A_XGM_STAT_##reg_lo) + \
795 ((u64)RMON_READ(mac, A_XGM_STAT_##reg_hi) << 32)
799 if (mac->multiport)
800 return t3_vsc7323_update_stats(mac);
802 RMON_UPDATE64(mac, rx_octets, RX_BYTES_LOW, RX_BYTES_HIGH);
803 RMON_UPDATE64(mac, rx_frames, RX_FRAMES_LOW, RX_FRAMES_HIGH);
804 RMON_UPDATE(mac, rx_mcast_frames, RX_MCAST_FRAMES);
805 RMON_UPDATE(mac, rx_bcast_frames, RX_BCAST_FRAMES);
806 RMON_UPDATE(mac, rx_fcs_errs, RX_CRC_ERR_FRAMES);
807 RMON_UPDATE(mac, rx_pause, RX_PAUSE_FRAMES);
808 RMON_UPDATE(mac, rx_jabber, RX_JABBER_FRAMES);
809 RMON_UPDATE(mac, rx_short, RX_SHORT_FRAMES);
810 RMON_UPDATE(mac, rx_symbol_errs, RX_SYM_CODE_ERR_FRAMES);
812 RMON_UPDATE(mac, rx_too_long, RX_OVERSIZE_FRAMES);
814 v = RMON_READ(mac, A_XGM_RX_MAX_PKT_SIZE_ERR_CNT);
815 if (mac->adapter->params.rev == T3_REV_B2)
817 mac->stats.rx_too_long += v;
819 RMON_UPDATE(mac, rx_frames_64, RX_64B_FRAMES);
820 RMON_UPDATE(mac, rx_frames_65_127, RX_65_127B_FRAMES);
821 RMON_UPDATE(mac, rx_frames_128_255, RX_128_255B_FRAMES);
822 RMON_UPDATE(mac, rx_frames_256_511, RX_256_511B_FRAMES);
823 RMON_UPDATE(mac, rx_frames_512_1023, RX_512_1023B_FRAMES);
824 RMON_UPDATE(mac, rx_frames_1024_1518, RX_1024_1518B_FRAMES);
825 RMON_UPDATE(mac, rx_frames_1519_max, RX_1519_MAXB_FRAMES);
827 RMON_UPDATE64(mac, tx_octets, TX_BYTE_LOW, TX_BYTE_HIGH);
828 RMON_UPDATE64(mac, tx_frames, TX_FRAME_LOW, TX_FRAME_HIGH);
829 RMON_UPDATE(mac, tx_mcast_frames, TX_MCAST);
830 RMON_UPDATE(mac, tx_bcast_frames, TX_BCAST);
831 RMON_UPDATE(mac, tx_pause, TX_PAUSE);
833 RMON_UPDATE(mac, tx_underrun, TX_ERR_FRAMES);
835 RMON_UPDATE(mac, tx_frames_64, TX_64B_FRAMES);
836 RMON_UPDATE(mac, tx_frames_65_127, TX_65_127B_FRAMES);
837 RMON_UPDATE(mac, tx_frames_128_255, TX_128_255B_FRAMES);
838 RMON_UPDATE(mac, tx_frames_256_511, TX_256_511B_FRAMES);
839 RMON_UPDATE(mac, tx_frames_512_1023, TX_512_1023B_FRAMES);
840 RMON_UPDATE(mac, tx_frames_1024_1518, TX_1024_1518B_FRAMES);
841 RMON_UPDATE(mac, tx_frames_1519_max, TX_1519_MAXB_FRAMES);
844 t3_write_reg(mac->adapter, A_TP_MIB_INDEX, mac->offset ? 51 : 50);
845 v = t3_read_reg(mac->adapter, A_TP_MIB_RDATA);
846 lo = (u32)mac->stats.rx_cong_drops;
847 mac->stats.rx_cong_drops += (u64)(v - lo);
849 return &mac->stats;