Lines Matching refs:block_id
56 static inline uint64_t CVMX_USBCX_DAINT(unsigned long block_id)
59 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
60 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
61 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
62 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
63 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
64 cvmx_warn("CVMX_USBCX_DAINT(%lu) is invalid on this chip\n", block_id);
65 return CVMX_ADD_IO_SEG(0x00016F0010000818ull) + ((block_id) & 1) * 0x100000000000ull;
68 #define CVMX_USBCX_DAINT(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000818ull) + ((block_id) & 1) * 0x100000000000ull)
71 static inline uint64_t CVMX_USBCX_DAINTMSK(unsigned long block_id)
74 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
75 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
76 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
77 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
78 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
79 cvmx_warn("CVMX_USBCX_DAINTMSK(%lu) is invalid on this chip\n", block_id);
80 return CVMX_ADD_IO_SEG(0x00016F001000081Cull) + ((block_id) & 1) * 0x100000000000ull;
83 #define CVMX_USBCX_DAINTMSK(block_id) (CVMX_ADD_IO_SEG(0x00016F001000081Cull) + ((block_id) & 1) * 0x100000000000ull)
86 static inline uint64_t CVMX_USBCX_DCFG(unsigned long block_id)
89 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
90 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
91 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
92 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
93 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
94 cvmx_warn("CVMX_USBCX_DCFG(%lu) is invalid on this chip\n", block_id);
95 return CVMX_ADD_IO_SEG(0x00016F0010000800ull) + ((block_id) & 1) * 0x100000000000ull;
98 #define CVMX_USBCX_DCFG(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000800ull) + ((block_id) & 1) * 0x100000000000ull)
101 static inline uint64_t CVMX_USBCX_DCTL(unsigned long block_id)
104 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
105 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
106 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
107 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
108 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
109 cvmx_warn("CVMX_USBCX_DCTL(%lu) is invalid on this chip\n", block_id);
110 return CVMX_ADD_IO_SEG(0x00016F0010000804ull) + ((block_id) & 1) * 0x100000000000ull;
113 #define CVMX_USBCX_DCTL(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000804ull) + ((block_id) & 1) * 0x100000000000ull)
116 static inline uint64_t CVMX_USBCX_DIEPCTLX(unsigned long offset, unsigned long block_id)
119 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 4)) && ((block_id == 0)))) ||
120 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 4)) && ((block_id == 0)))) ||
121 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 4)) && ((block_id == 0)))) ||
122 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 4)) && ((block_id <= 1)))) ||
123 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 4)) && ((block_id == 0))))))
124 cvmx_warn("CVMX_USBCX_DIEPCTLX(%lu,%lu) is invalid on this chip\n", offset, block_id);
125 return CVMX_ADD_IO_SEG(0x00016F0010000900ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32;
128 #define CVMX_USBCX_DIEPCTLX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010000900ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32)
131 static inline uint64_t CVMX_USBCX_DIEPINTX(unsigned long offset, unsigned long block_id)
134 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 4)) && ((block_id == 0)))) ||
135 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 4)) && ((block_id == 0)))) ||
136 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 4)) && ((block_id == 0)))) ||
137 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 4)) && ((block_id <= 1)))) ||
138 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 4)) && ((block_id == 0))))))
139 cvmx_warn("CVMX_USBCX_DIEPINTX(%lu,%lu) is invalid on this chip\n", offset, block_id);
140 return CVMX_ADD_IO_SEG(0x00016F0010000908ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32;
143 #define CVMX_USBCX_DIEPINTX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010000908ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32)
146 static inline uint64_t CVMX_USBCX_DIEPMSK(unsigned long block_id)
149 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
150 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
151 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
152 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
153 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
154 cvmx_warn("CVMX_USBCX_DIEPMSK(%lu) is invalid on this chip\n", block_id);
155 return CVMX_ADD_IO_SEG(0x00016F0010000810ull) + ((block_id) & 1) * 0x100000000000ull;
158 #define CVMX_USBCX_DIEPMSK(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000810ull) + ((block_id) & 1) * 0x100000000000ull)
161 static inline uint64_t CVMX_USBCX_DIEPTSIZX(unsigned long offset, unsigned long block_id)
164 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 4)) && ((block_id == 0)))) ||
165 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 4)) && ((block_id == 0)))) ||
166 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 4)) && ((block_id == 0)))) ||
167 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 4)) && ((block_id <= 1)))) ||
168 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 4)) && ((block_id == 0))))))
169 cvmx_warn("CVMX_USBCX_DIEPTSIZX(%lu,%lu) is invalid on this chip\n", offset, block_id);
170 return CVMX_ADD_IO_SEG(0x00016F0010000910ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32;
173 #define CVMX_USBCX_DIEPTSIZX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010000910ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32)
176 static inline uint64_t CVMX_USBCX_DOEPCTLX(unsigned long offset, unsigned long block_id)
179 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 4)) && ((block_id == 0)))) ||
180 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 4)) && ((block_id == 0)))) ||
181 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 4)) && ((block_id == 0)))) ||
182 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 4)) && ((block_id <= 1)))) ||
183 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 4)) && ((block_id == 0))))))
184 cvmx_warn("CVMX_USBCX_DOEPCTLX(%lu,%lu) is invalid on this chip\n", offset, block_id);
185 return CVMX_ADD_IO_SEG(0x00016F0010000B00ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32;
188 #define CVMX_USBCX_DOEPCTLX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010000B00ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32)
191 static inline uint64_t CVMX_USBCX_DOEPINTX(unsigned long offset, unsigned long block_id)
194 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 4)) && ((block_id == 0)))) ||
195 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 4)) && ((block_id == 0)))) ||
196 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 4)) && ((block_id == 0)))) ||
197 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 4)) && ((block_id <= 1)))) ||
198 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 4)) && ((block_id == 0))))))
199 cvmx_warn("CVMX_USBCX_DOEPINTX(%lu,%lu) is invalid on this chip\n", offset, block_id);
200 return CVMX_ADD_IO_SEG(0x00016F0010000B08ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32;
203 #define CVMX_USBCX_DOEPINTX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010000B08ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32)
206 static inline uint64_t CVMX_USBCX_DOEPMSK(unsigned long block_id)
209 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
210 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
211 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
212 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
213 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
214 cvmx_warn("CVMX_USBCX_DOEPMSK(%lu) is invalid on this chip\n", block_id);
215 return CVMX_ADD_IO_SEG(0x00016F0010000814ull) + ((block_id) & 1) * 0x100000000000ull;
218 #define CVMX_USBCX_DOEPMSK(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000814ull) + ((block_id) & 1) * 0x100000000000ull)
221 static inline uint64_t CVMX_USBCX_DOEPTSIZX(unsigned long offset, unsigned long block_id)
224 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 4)) && ((block_id == 0)))) ||
225 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 4)) && ((block_id == 0)))) ||
226 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 4)) && ((block_id == 0)))) ||
227 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 4)) && ((block_id <= 1)))) ||
228 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 4)) && ((block_id == 0))))))
229 cvmx_warn("CVMX_USBCX_DOEPTSIZX(%lu,%lu) is invalid on this chip\n", offset, block_id);
230 return CVMX_ADD_IO_SEG(0x00016F0010000B10ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32;
233 #define CVMX_USBCX_DOEPTSIZX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010000B10ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32)
236 static inline uint64_t CVMX_USBCX_DPTXFSIZX(unsigned long offset, unsigned long block_id)
239 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((((offset >= 1) && (offset <= 4))) && ((block_id == 0)))) ||
240 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((((offset >= 1) && (offset <= 4))) && ((block_id == 0)))) ||
241 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((((offset >= 1) && (offset <= 4))) && ((block_id == 0)))) ||
242 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((((offset >= 1) && (offset <= 4))) && ((block_id <= 1)))) ||
243 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((((offset >= 1) && (offset <= 4))) && ((block_id == 0))))))
244 cvmx_warn("CVMX_USBCX_DPTXFSIZX(%lu,%lu) is invalid on this chip\n", offset, block_id);
245 return CVMX_ADD_IO_SEG(0x00016F0010000100ull) + (((offset) & 7) + ((block_id) & 1) * 0x40000000000ull) * 4;
248 #define CVMX_USBCX_DPTXFSIZX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010000100ull) + (((offset) & 7) + ((block_id) & 1) * 0x40000000000ull) * 4)
251 static inline uint64_t CVMX_USBCX_DSTS(unsigned long block_id)
254 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
255 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
256 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
257 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
258 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
259 cvmx_warn("CVMX_USBCX_DSTS(%lu) is invalid on this chip\n", block_id);
260 return CVMX_ADD_IO_SEG(0x00016F0010000808ull) + ((block_id) & 1) * 0x100000000000ull;
263 #define CVMX_USBCX_DSTS(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000808ull) + ((block_id) & 1) * 0x100000000000ull)
266 static inline uint64_t CVMX_USBCX_DTKNQR1(unsigned long block_id)
269 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
270 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
271 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
272 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
273 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
274 cvmx_warn("CVMX_USBCX_DTKNQR1(%lu) is invalid on this chip\n", block_id);
275 return CVMX_ADD_IO_SEG(0x00016F0010000820ull) + ((block_id) & 1) * 0x100000000000ull;
278 #define CVMX_USBCX_DTKNQR1(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000820ull) + ((block_id) & 1) * 0x100000000000ull)
281 static inline uint64_t CVMX_USBCX_DTKNQR2(unsigned long block_id)
284 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
285 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
286 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
287 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
288 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
289 cvmx_warn("CVMX_USBCX_DTKNQR2(%lu) is invalid on this chip\n", block_id);
290 return CVMX_ADD_IO_SEG(0x00016F0010000824ull) + ((block_id) & 1) * 0x100000000000ull;
293 #define CVMX_USBCX_DTKNQR2(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000824ull) + ((block_id) & 1) * 0x100000000000ull)
296 static inline uint64_t CVMX_USBCX_DTKNQR3(unsigned long block_id)
299 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
300 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
301 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
302 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
303 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
304 cvmx_warn("CVMX_USBCX_DTKNQR3(%lu) is invalid on this chip\n", block_id);
305 return CVMX_ADD_IO_SEG(0x00016F0010000830ull) + ((block_id) & 1) * 0x100000000000ull;
308 #define CVMX_USBCX_DTKNQR3(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000830ull) + ((block_id) & 1) * 0x100000000000ull)
311 static inline uint64_t CVMX_USBCX_DTKNQR4(unsigned long block_id)
314 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
315 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
316 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
317 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
318 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
319 cvmx_warn("CVMX_USBCX_DTKNQR4(%lu) is invalid on this chip\n", block_id);
320 return CVMX_ADD_IO_SEG(0x00016F0010000834ull) + ((block_id) & 1) * 0x100000000000ull;
323 #define CVMX_USBCX_DTKNQR4(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000834ull) + ((block_id) & 1) * 0x100000000000ull)
326 static inline uint64_t CVMX_USBCX_GAHBCFG(unsigned long block_id)
329 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
330 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
331 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
332 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
333 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
334 cvmx_warn("CVMX_USBCX_GAHBCFG(%lu) is invalid on this chip\n", block_id);
335 return CVMX_ADD_IO_SEG(0x00016F0010000008ull) + ((block_id) & 1) * 0x100000000000ull;
338 #define CVMX_USBCX_GAHBCFG(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000008ull) + ((block_id) & 1) * 0x100000000000ull)
341 static inline uint64_t CVMX_USBCX_GHWCFG1(unsigned long block_id)
344 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
345 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
346 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
347 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
348 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
349 cvmx_warn("CVMX_USBCX_GHWCFG1(%lu) is invalid on this chip\n", block_id);
350 return CVMX_ADD_IO_SEG(0x00016F0010000044ull) + ((block_id) & 1) * 0x100000000000ull;
353 #define CVMX_USBCX_GHWCFG1(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000044ull) + ((block_id) & 1) * 0x100000000000ull)
356 static inline uint64_t CVMX_USBCX_GHWCFG2(unsigned long block_id)
359 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
360 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
361 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
362 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
363 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
364 cvmx_warn("CVMX_USBCX_GHWCFG2(%lu) is invalid on this chip\n", block_id);
365 return CVMX_ADD_IO_SEG(0x00016F0010000048ull) + ((block_id) & 1) * 0x100000000000ull;
368 #define CVMX_USBCX_GHWCFG2(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000048ull) + ((block_id) & 1) * 0x100000000000ull)
371 static inline uint64_t CVMX_USBCX_GHWCFG3(unsigned long block_id)
374 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
375 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
376 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
377 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
378 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
379 cvmx_warn("CVMX_USBCX_GHWCFG3(%lu) is invalid on this chip\n", block_id);
380 return CVMX_ADD_IO_SEG(0x00016F001000004Cull) + ((block_id) & 1) * 0x100000000000ull;
383 #define CVMX_USBCX_GHWCFG3(block_id) (CVMX_ADD_IO_SEG(0x00016F001000004Cull) + ((block_id) & 1) * 0x100000000000ull)
386 static inline uint64_t CVMX_USBCX_GHWCFG4(unsigned long block_id)
389 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
390 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
391 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
392 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
393 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
394 cvmx_warn("CVMX_USBCX_GHWCFG4(%lu) is invalid on this chip\n", block_id);
395 return CVMX_ADD_IO_SEG(0x00016F0010000050ull) + ((block_id) & 1) * 0x100000000000ull;
398 #define CVMX_USBCX_GHWCFG4(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000050ull) + ((block_id) & 1) * 0x100000000000ull)
401 static inline uint64_t CVMX_USBCX_GINTMSK(unsigned long block_id)
404 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
405 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
406 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
407 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
408 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
409 cvmx_warn("CVMX_USBCX_GINTMSK(%lu) is invalid on this chip\n", block_id);
410 return CVMX_ADD_IO_SEG(0x00016F0010000018ull) + ((block_id) & 1) * 0x100000000000ull;
413 #define CVMX_USBCX_GINTMSK(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000018ull) + ((block_id) & 1) * 0x100000000000ull)
416 static inline uint64_t CVMX_USBCX_GINTSTS(unsigned long block_id)
419 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
420 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
421 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
422 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
423 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
424 cvmx_warn("CVMX_USBCX_GINTSTS(%lu) is invalid on this chip\n", block_id);
425 return CVMX_ADD_IO_SEG(0x00016F0010000014ull) + ((block_id) & 1) * 0x100000000000ull;
428 #define CVMX_USBCX_GINTSTS(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000014ull) + ((block_id) & 1) * 0x100000000000ull)
431 static inline uint64_t CVMX_USBCX_GNPTXFSIZ(unsigned long block_id)
434 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
435 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
436 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
437 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
438 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
439 cvmx_warn("CVMX_USBCX_GNPTXFSIZ(%lu) is invalid on this chip\n", block_id);
440 return CVMX_ADD_IO_SEG(0x00016F0010000028ull) + ((block_id) & 1) * 0x100000000000ull;
443 #define CVMX_USBCX_GNPTXFSIZ(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000028ull) + ((block_id) & 1) * 0x100000000000ull)
446 static inline uint64_t CVMX_USBCX_GNPTXSTS(unsigned long block_id)
449 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
450 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
451 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
452 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
453 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
454 cvmx_warn("CVMX_USBCX_GNPTXSTS(%lu) is invalid on this chip\n", block_id);
455 return CVMX_ADD_IO_SEG(0x00016F001000002Cull) + ((block_id) & 1) * 0x100000000000ull;
458 #define CVMX_USBCX_GNPTXSTS(block_id) (CVMX_ADD_IO_SEG(0x00016F001000002Cull) + ((block_id) & 1) * 0x100000000000ull)
461 static inline uint64_t CVMX_USBCX_GOTGCTL(unsigned long block_id)
464 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
465 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
466 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
467 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
468 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
469 cvmx_warn("CVMX_USBCX_GOTGCTL(%lu) is invalid on this chip\n", block_id);
470 return CVMX_ADD_IO_SEG(0x00016F0010000000ull) + ((block_id) & 1) * 0x100000000000ull;
473 #define CVMX_USBCX_GOTGCTL(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000000ull) + ((block_id) & 1) * 0x100000000000ull)
476 static inline uint64_t CVMX_USBCX_GOTGINT(unsigned long block_id)
479 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
480 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
481 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
482 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
483 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
484 cvmx_warn("CVMX_USBCX_GOTGINT(%lu) is invalid on this chip\n", block_id);
485 return CVMX_ADD_IO_SEG(0x00016F0010000004ull) + ((block_id) & 1) * 0x100000000000ull;
488 #define CVMX_USBCX_GOTGINT(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000004ull) + ((block_id) & 1) * 0x100000000000ull)
491 static inline uint64_t CVMX_USBCX_GRSTCTL(unsigned long block_id)
494 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
495 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
496 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
497 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
498 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
499 cvmx_warn("CVMX_USBCX_GRSTCTL(%lu) is invalid on this chip\n", block_id);
500 return CVMX_ADD_IO_SEG(0x00016F0010000010ull) + ((block_id) & 1) * 0x100000000000ull;
503 #define CVMX_USBCX_GRSTCTL(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000010ull) + ((block_id) & 1) * 0x100000000000ull)
506 static inline uint64_t CVMX_USBCX_GRXFSIZ(unsigned long block_id)
509 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
510 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
511 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
512 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
513 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
514 cvmx_warn("CVMX_USBCX_GRXFSIZ(%lu) is invalid on this chip\n", block_id);
515 return CVMX_ADD_IO_SEG(0x00016F0010000024ull) + ((block_id) & 1) * 0x100000000000ull;
518 #define CVMX_USBCX_GRXFSIZ(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000024ull) + ((block_id) & 1) * 0x100000000000ull)
521 static inline uint64_t CVMX_USBCX_GRXSTSPD(unsigned long block_id)
524 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
525 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
526 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
527 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
528 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
529 cvmx_warn("CVMX_USBCX_GRXSTSPD(%lu) is invalid on this chip\n", block_id);
530 return CVMX_ADD_IO_SEG(0x00016F0010040020ull) + ((block_id) & 1) * 0x100000000000ull;
533 #define CVMX_USBCX_GRXSTSPD(block_id) (CVMX_ADD_IO_SEG(0x00016F0010040020ull) + ((block_id) & 1) * 0x100000000000ull)
536 static inline uint64_t CVMX_USBCX_GRXSTSPH(unsigned long block_id)
539 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
540 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
541 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
542 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
543 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
544 cvmx_warn("CVMX_USBCX_GRXSTSPH(%lu) is invalid on this chip\n", block_id);
545 return CVMX_ADD_IO_SEG(0x00016F0010000020ull) + ((block_id) & 1) * 0x100000000000ull;
548 #define CVMX_USBCX_GRXSTSPH(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000020ull) + ((block_id) & 1) * 0x100000000000ull)
551 static inline uint64_t CVMX_USBCX_GRXSTSRD(unsigned long block_id)
554 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
555 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
556 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
557 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
558 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
559 cvmx_warn("CVMX_USBCX_GRXSTSRD(%lu) is invalid on this chip\n", block_id);
560 return CVMX_ADD_IO_SEG(0x00016F001004001Cull) + ((block_id) & 1) * 0x100000000000ull;
563 #define CVMX_USBCX_GRXSTSRD(block_id) (CVMX_ADD_IO_SEG(0x00016F001004001Cull) + ((block_id) & 1) * 0x100000000000ull)
566 static inline uint64_t CVMX_USBCX_GRXSTSRH(unsigned long block_id)
569 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
570 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
571 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
572 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
573 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
574 cvmx_warn("CVMX_USBCX_GRXSTSRH(%lu) is invalid on this chip\n", block_id);
575 return CVMX_ADD_IO_SEG(0x00016F001000001Cull) + ((block_id) & 1) * 0x100000000000ull;
578 #define CVMX_USBCX_GRXSTSRH(block_id) (CVMX_ADD_IO_SEG(0x00016F001000001Cull) + ((block_id) & 1) * 0x100000000000ull)
581 static inline uint64_t CVMX_USBCX_GSNPSID(unsigned long block_id)
584 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
585 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
586 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
587 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
588 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
589 cvmx_warn("CVMX_USBCX_GSNPSID(%lu) is invalid on this chip\n", block_id);
590 return CVMX_ADD_IO_SEG(0x00016F0010000040ull) + ((block_id) & 1) * 0x100000000000ull;
593 #define CVMX_USBCX_GSNPSID(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000040ull) + ((block_id) & 1) * 0x100000000000ull)
596 static inline uint64_t CVMX_USBCX_GUSBCFG(unsigned long block_id)
599 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
600 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
601 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
602 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
603 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
604 cvmx_warn("CVMX_USBCX_GUSBCFG(%lu) is invalid on this chip\n", block_id);
605 return CVMX_ADD_IO_SEG(0x00016F001000000Cull) + ((block_id) & 1) * 0x100000000000ull;
608 #define CVMX_USBCX_GUSBCFG(block_id) (CVMX_ADD_IO_SEG(0x00016F001000000Cull) + ((block_id) & 1) * 0x100000000000ull)
611 static inline uint64_t CVMX_USBCX_HAINT(unsigned long block_id)
614 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
615 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
616 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
617 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
618 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
619 cvmx_warn("CVMX_USBCX_HAINT(%lu) is invalid on this chip\n", block_id);
620 return CVMX_ADD_IO_SEG(0x00016F0010000414ull) + ((block_id) & 1) * 0x100000000000ull;
623 #define CVMX_USBCX_HAINT(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000414ull) + ((block_id) & 1) * 0x100000000000ull)
626 static inline uint64_t CVMX_USBCX_HAINTMSK(unsigned long block_id)
629 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
630 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
631 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
632 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
633 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
634 cvmx_warn("CVMX_USBCX_HAINTMSK(%lu) is invalid on this chip\n", block_id);
635 return CVMX_ADD_IO_SEG(0x00016F0010000418ull) + ((block_id) & 1) * 0x100000000000ull;
638 #define CVMX_USBCX_HAINTMSK(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000418ull) + ((block_id) & 1) * 0x100000000000ull)
641 static inline uint64_t CVMX_USBCX_HCCHARX(unsigned long offset, unsigned long block_id)
644 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 7)) && ((block_id == 0)))) ||
645 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 7)) && ((block_id == 0)))) ||
646 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 7)) && ((block_id == 0)))) ||
647 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 7)) && ((block_id <= 1)))) ||
648 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 7)) && ((block_id == 0))))))
649 cvmx_warn("CVMX_USBCX_HCCHARX(%lu,%lu) is invalid on this chip\n", offset, block_id);
650 return CVMX_ADD_IO_SEG(0x00016F0010000500ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32;
653 #define CVMX_USBCX_HCCHARX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010000500ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32)
656 static inline uint64_t CVMX_USBCX_HCFG(unsigned long block_id)
659 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
660 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
661 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
662 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
663 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
664 cvmx_warn("CVMX_USBCX_HCFG(%lu) is invalid on this chip\n", block_id);
665 return CVMX_ADD_IO_SEG(0x00016F0010000400ull) + ((block_id) & 1) * 0x100000000000ull;
668 #define CVMX_USBCX_HCFG(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000400ull) + ((block_id) & 1) * 0x100000000000ull)
671 static inline uint64_t CVMX_USBCX_HCINTMSKX(unsigned long offset, unsigned long block_id)
674 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 7)) && ((block_id == 0)))) ||
675 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 7)) && ((block_id == 0)))) ||
676 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 7)) && ((block_id == 0)))) ||
677 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 7)) && ((block_id <= 1)))) ||
678 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 7)) && ((block_id == 0))))))
679 cvmx_warn("CVMX_USBCX_HCINTMSKX(%lu,%lu) is invalid on this chip\n", offset, block_id);
680 return CVMX_ADD_IO_SEG(0x00016F001000050Cull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32;
683 #define CVMX_USBCX_HCINTMSKX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F001000050Cull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32)
686 static inline uint64_t CVMX_USBCX_HCINTX(unsigned long offset, unsigned long block_id)
689 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 7)) && ((block_id == 0)))) ||
690 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 7)) && ((block_id == 0)))) ||
691 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 7)) && ((block_id == 0)))) ||
692 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 7)) && ((block_id <= 1)))) ||
693 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 7)) && ((block_id == 0))))))
694 cvmx_warn("CVMX_USBCX_HCINTX(%lu,%lu) is invalid on this chip\n", offset, block_id);
695 return CVMX_ADD_IO_SEG(0x00016F0010000508ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32;
698 #define CVMX_USBCX_HCINTX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010000508ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32)
701 static inline uint64_t CVMX_USBCX_HCSPLTX(unsigned long offset, unsigned long block_id)
704 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 7)) && ((block_id == 0)))) ||
705 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 7)) && ((block_id == 0)))) ||
706 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 7)) && ((block_id == 0)))) ||
707 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 7)) && ((block_id <= 1)))) ||
708 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 7)) && ((block_id == 0))))))
709 cvmx_warn("CVMX_USBCX_HCSPLTX(%lu,%lu) is invalid on this chip\n", offset, block_id);
710 return CVMX_ADD_IO_SEG(0x00016F0010000504ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32;
713 #define CVMX_USBCX_HCSPLTX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010000504ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32)
716 static inline uint64_t CVMX_USBCX_HCTSIZX(unsigned long offset, unsigned long block_id)
719 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 7)) && ((block_id == 0)))) ||
720 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 7)) && ((block_id == 0)))) ||
721 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 7)) && ((block_id == 0)))) ||
722 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 7)) && ((block_id <= 1)))) ||
723 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 7)) && ((block_id == 0))))))
724 cvmx_warn("CVMX_USBCX_HCTSIZX(%lu,%lu) is invalid on this chip\n", offset, block_id);
725 return CVMX_ADD_IO_SEG(0x00016F0010000510ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32;
728 #define CVMX_USBCX_HCTSIZX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010000510ull) + (((offset) & 7) + ((block_id) & 1) * 0x8000000000ull) * 32)
731 static inline uint64_t CVMX_USBCX_HFIR(unsigned long block_id)
734 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
735 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
736 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
737 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
738 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
739 cvmx_warn("CVMX_USBCX_HFIR(%lu) is invalid on this chip\n", block_id);
740 return CVMX_ADD_IO_SEG(0x00016F0010000404ull) + ((block_id) & 1) * 0x100000000000ull;
743 #define CVMX_USBCX_HFIR(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000404ull) + ((block_id) & 1) * 0x100000000000ull)
746 static inline uint64_t CVMX_USBCX_HFNUM(unsigned long block_id)
749 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
750 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
751 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
752 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
753 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
754 cvmx_warn("CVMX_USBCX_HFNUM(%lu) is invalid on this chip\n", block_id);
755 return CVMX_ADD_IO_SEG(0x00016F0010000408ull) + ((block_id) & 1) * 0x100000000000ull;
758 #define CVMX_USBCX_HFNUM(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000408ull) + ((block_id) & 1) * 0x100000000000ull)
761 static inline uint64_t CVMX_USBCX_HPRT(unsigned long block_id)
764 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
765 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
766 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
767 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
768 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
769 cvmx_warn("CVMX_USBCX_HPRT(%lu) is invalid on this chip\n", block_id);
770 return CVMX_ADD_IO_SEG(0x00016F0010000440ull) + ((block_id) & 1) * 0x100000000000ull;
773 #define CVMX_USBCX_HPRT(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000440ull) + ((block_id) & 1) * 0x100000000000ull)
776 static inline uint64_t CVMX_USBCX_HPTXFSIZ(unsigned long block_id)
779 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
780 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
781 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
782 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
783 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
784 cvmx_warn("CVMX_USBCX_HPTXFSIZ(%lu) is invalid on this chip\n", block_id);
785 return CVMX_ADD_IO_SEG(0x00016F0010000100ull) + ((block_id) & 1) * 0x100000000000ull;
788 #define CVMX_USBCX_HPTXFSIZ(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000100ull) + ((block_id) & 1) * 0x100000000000ull)
791 static inline uint64_t CVMX_USBCX_HPTXSTS(unsigned long block_id)
794 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
795 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
796 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
797 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
798 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
799 cvmx_warn("CVMX_USBCX_HPTXSTS(%lu) is invalid on this chip\n", block_id);
800 return CVMX_ADD_IO_SEG(0x00016F0010000410ull) + ((block_id) & 1) * 0x100000000000ull;
803 #define CVMX_USBCX_HPTXSTS(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000410ull) + ((block_id) & 1) * 0x100000000000ull)
806 static inline uint64_t CVMX_USBCX_NPTXDFIFOX(unsigned long offset, unsigned long block_id)
809 (OCTEON_IS_MODEL(OCTEON_CN30XX) && (((offset <= 7)) && ((block_id == 0)))) ||
810 (OCTEON_IS_MODEL(OCTEON_CN31XX) && (((offset <= 7)) && ((block_id == 0)))) ||
811 (OCTEON_IS_MODEL(OCTEON_CN50XX) && (((offset <= 7)) && ((block_id == 0)))) ||
812 (OCTEON_IS_MODEL(OCTEON_CN52XX) && (((offset <= 7)) && ((block_id <= 1)))) ||
813 (OCTEON_IS_MODEL(OCTEON_CN56XX) && (((offset <= 7)) && ((block_id == 0))))))
814 cvmx_warn("CVMX_USBCX_NPTXDFIFOX(%lu,%lu) is invalid on this chip\n", offset, block_id);
815 return CVMX_ADD_IO_SEG(0x00016F0010001000ull) + (((offset) & 7) + ((block_id) & 1) * 0x100000000ull) * 4096;
818 #define CVMX_USBCX_NPTXDFIFOX(offset, block_id) (CVMX_ADD_IO_SEG(0x00016F0010001000ull) + (((offset) & 7) + ((block_id) & 1) * 0x100000000ull) * 4096)
821 static inline uint64_t CVMX_USBCX_PCGCCTL(unsigned long block_id)
824 (OCTEON_IS_MODEL(OCTEON_CN30XX) && ((block_id == 0))) ||
825 (OCTEON_IS_MODEL(OCTEON_CN31XX) && ((block_id == 0))) ||
826 (OCTEON_IS_MODEL(OCTEON_CN50XX) && ((block_id == 0))) ||
827 (OCTEON_IS_MODEL(OCTEON_CN52XX) && ((block_id <= 1))) ||
828 (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((block_id == 0)))))
829 cvmx_warn("CVMX_USBCX_PCGCCTL(%lu) is invalid on this chip\n", block_id);
830 return CVMX_ADD_IO_SEG(0x00016F0010000E00ull) + ((block_id) & 1) * 0x100000000000ull;
833 #define CVMX_USBCX_PCGCCTL(block_id) (CVMX_ADD_IO_SEG(0x00016F0010000E00ull) + ((block_id) & 1) * 0x100000000000ull)