Lines Matching defs:sc

115 	struct ohci_softc *sc = device_get_softc(dev);
122 sc->sc_bus.parent = dev;
123 sc->sc_bus.devices = sc->sc_devices;
124 sc->sc_bus.devices_max = OHCI_MAX_DEVICES;
125 sc->sc_bus.dma_bits = 32;
127 if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev),
132 sc->sc_io_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
133 if (!sc->sc_io_res) {
138 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
139 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
140 sc->sc_io_size = rman_get_size(sc->sc_io_res);
143 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
144 if (sc->sc_irq_res == NULL) {
149 sc->sc_bus.bdev = device_add_child(dev, "usbus", -1);
150 if (!(sc->sc_bus.bdev))
153 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
154 strlcpy(sc->sc_vendor, "NXP", sizeof(sc->sc_vendor));
156 err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
157 NULL, (void *)ohci_interrupt, sc, &sc->sc_intr_hdl);
159 sc->sc_intr_hdl = NULL;
168 lpc_otg_wait_write_4(sc, LPC_OTG_CLOCK_CTRL,
172 lpc_otg_i2c_reset(sc);
174 lpc_isp3101_configure(dev, sc);
199 lpc_otg_wait_write_4(sc, LPC_OTG_CLOCK_CTRL, LPC_OTG_CLOCK_STATUS,
203 otgstatus = lpc_otg_read_4(sc, LPC_OTG_STATUS);
204 lpc_otg_write_4(sc, LPC_OTG_STATUS, otgstatus |
207 lpc_isp3101_write(sc, LPC_ISP3101_OTG_CONTROL_1,
210 err = ohci_init(sc);
214 err = device_probe_and_attach(sc->sc_bus.bdev);
221 if (sc->sc_intr_hdl)
222 bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr_hdl);
223 if (sc->sc_irq_res)
224 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->sc_irq_res);
225 if (sc->sc_io_res)
226 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_io_res);
232 lpc_isp3101_read(struct ohci_softc *sc, int reg)
237 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX,
239 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX, reg);
240 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX, (LPC_ISP3101_I2C_ADDR << 1) |
242 lpc_otg_write_4(sc, LPC_OTG_I2C_TXRX, I2C_STOP_BIT | DUMMY_BYTE);
245 status = lpc_otg_read_4(sc, LPC_OTG_I2C_STATUS);
249 lpc_otg_write_4(sc, LPC_OTG_I2C_STATUS, LPC_OTG_I2C_STATUS_TDI);
251 return (lpc_otg_read_4(sc, LPC_OTG_I2C_TXRX) & 0xff);
255 lpc_otg_i2c_reset(struct ohci_softc *sc)
260 lpc_otg_write_4(sc, LPC_OTG_I2C_CLKHI, 0x3f);
261 lpc_otg_write_4(sc, LPC_OTG_I2C_CLKLO, 0x3f);
263 ctrl = lpc_otg_read_4(sc, LPC_OTG_I2C_CTRL);
264 lpc_otg_write_4(sc, LPC_OTG_I2C_CTRL, ctrl | LPC_OTG_I2C_CTRL_SRST);
267 ctrl = lpc_otg_read_4(sc, LPC_OTG_I2C_CTRL);
273 lpc_isp3101_write(struct ohci_softc *sc, int reg, int value)
278 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_TXRX,
280 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_TXRX,
282 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_TXRX,
286 status = bus_space_read_4(sc->sc_io_tag, sc->sc_io_hdl,
291 bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, LPC_OTG_I2C_STATUS,
296 lpc_isp3101_clear(struct ohci_softc *sc, int reg, int value)
298 lpc_isp3101_write(sc, (reg | LPC_ISP3101_REG_CLEAR_ADDR), value);
302 lpc_isp3101_configure(device_t dev, struct ohci_softc *sc)
304 lpc_isp3101_clear(sc, LPC_ISP3101_MODE_CONTROL_1, LPC_ISP3101_MC1_UART_EN);
305 lpc_isp3101_clear(sc, LPC_ISP3101_MODE_CONTROL_1, ~LPC_ISP3101_MC1_SPEED_REG);
306 lpc_isp3101_write(sc, LPC_ISP3101_MODE_CONTROL_1, LPC_ISP3101_MC1_SPEED_REG);
307 lpc_isp3101_clear(sc, LPC_ISP3101_MODE_CONTROL_2, ~0);
308 lpc_isp3101_write(sc, LPC_ISP3101_MODE_CONTROL_2,
312 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_CONTROL_1, ~0);
313 lpc_isp3101_write(sc, LPC_ISP3101_MODE_CONTROL_1, LPC_ISP3101_MC1_DAT_SE0);
314 lpc_isp3101_write(sc, LPC_ISP3101_OTG_CONTROL_1,
317 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_CONTROL_1,
320 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_INTR_LATCH, ~0);
321 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_INTR_FALLING, ~0);
322 lpc_isp3101_clear(sc, LPC_ISP3101_OTG_INTR_RISING, ~0);
326 (lpc_isp3101_read(sc, 0x00) | (lpc_isp3101_read(sc, 0x01) << 8)),
327 (lpc_isp3101_read(sc, 0x03) | (lpc_isp3101_read(sc, 0x04) << 8)),
328 (lpc_isp3101_read(sc, 0x14) | (lpc_isp3101_read(sc, 0x15) << 8)));