Lines Matching refs:offset

73      hold the reg+offset to use when restoring sp from a frame pointer.	 */
2991 int offset;
3001 offset = nbytes - size;
3003 fix_new_exp (frag_now, p - frag_now->fr_literal + offset,
3120 /* Self relative offset of the function start. */
3145 /* Self relative offset of the table entry. */
3690 int offset;
3703 if (immediate_for_directive (&offset) == FAIL)
3707 offset = 0;
3726 unwind.fp_offset = unwind.frame_size - offset;
3735 int offset;
3737 if (immediate_for_directive (&offset) == FAIL)
3740 if (offset & 3)
3748 unwind.frame_size += offset;
3749 unwind.pending_offset += offset;
3761 int offset;
3779 if (immediate_for_directive (&offset) == FAIL)
3783 offset = 0;
3798 unwind.fp_offset = unwind.frame_size - offset;
3800 unwind.fp_offset -= offset;
3825 as_bad (_("expected <offset>, <opcode>"));
4568 [Rn, #offset] .reg=Rn .reloc.exp=offset
4577 [Rn], #offset .reg=Rn .reloc.exp=offset
4606 /* bare address - translate to PC-relative offset */
5846 parse_fpa_immediate has already applied the offset. */
6316 else /* immediate offset in inst.reloc */
6345 else /* immediate offset in inst.reloc */
6586 /* Frag hacking will turn this into a sub instruction if the offset turns
6603 /* Frag hacking will turn this into a sub instruction if the offset turns
6991 _("offset must be zero in ARM encoding"));
7571 _("offset must be zero in ARM encoding"));
8413 /* To catch errors in encoding functions, the codes are all offset by
9463 _("invalid base register for register offset"));
9480 /* Immediate offset. */
9487 /* Register offset. */
13922 int offset;
13932 offset = inst.reloc.exp.X_add_number;
13936 offset = inst.reloc.exp.X_add_number;
13940 offset = 0;
13944 inst.relax, sym, offset, NULL/*offset, opcode*/);
14107 int offset = 2;
14116 offset = 0;
14120 *str = end + offset;
14122 if (end[offset] == '.')
14129 else if (end[offset] != '\0' && end[offset] != ' ')
14445 The second instruction converts a table index into a byte offset.
14601 /* iWMMXt scalar (constant/offset) registers - p1, c8-11. */
16854 offsetT offset;
16864 offset = fragp->fr_offset;
16866 if (offset & low)
16868 if (offset & ~mask)
16941 size of the offset field in the narrow instruction. */
17206 /* Cenerate and deferred unwind frame offset. */
17211 offsetT offset;
17213 offset = unwind.pending_offset;
17215 if (offset != 0)
17216 add_unwind_adjustsp (offset);
17253 add_unwind_adjustsp (offsetT offset)
17257 if (offset > 0x200)
17267 o = (valueT) ((offset - 0x204) >> 2);
17271 /* Calculate the uleb128 encoding of the offset. */
17286 else if (offset > 0x100)
17290 op = (offset - 0x104) >> 2;
17293 else if (offset > 0)
17296 op = (offset - 4) >> 2;
17299 else if (offset < 0)
17301 offset = -offset;
17302 while (offset > 0x100)
17305 offset -= 0x100;
17307 op = ((offset - 4) >> 2) | 0x40;
17610 Thumb branches are offset by 4, and Thumb loads relative to PC
17637 pipeline offset. However, Thumb adrl already adjusts for
17648 /* Thumb branches are simply offset by +4. */
17658 /* ARM mode branches are offset by +8. However, the Windows CE
17668 we must account for the offset by +8, as the OS loader will never see the reloc.
17682 /* ARM mode loads relative to PC are also offset by +8. Unlike
17693 /* Other PC-relative relocations are un-offset. */
18073 _("unable to compute ADRL instructions for PC offset of 0x%lx"),
18111 _("bad immediate value for offset (%ld)"),
18135 as_bad (_("bad immediate value for 8-bit offset (%ld)"),
18149 _("bad immediate value for offset (%ld)"), (long) value);
18159 load/store instruction with immediate offset:
18182 /* Doubleword load/store: 8-bit offset, scaled by 4. */
18190 _("offset not a multiple of 4"));
18197 _("offset out of range"));
18204 /* PC-relative, 12-bit offset. */
18212 _("offset out of range"));
18219 /* Writeback: 8-bit, +/- offset. */
18227 _("offset out of range"));
18234 /* T-instruction: positive 8-bit offset. */
18238 _("offset out of range"));
18246 /* Positive 12-bit or negative 8-bit offset. */
18261 _("offset out of range"));
18642 _("co-processor offset out of range"));
18665 _("co-processor offset out of range"));
18671 /* Exactly what ranges, and where the offset is inserted depends
18682 _("invalid offset, target not word aligned (0x%08lX)"),
18689 _("invalid offset, value too big (0x%08lX)"),
18698 _("invalid offset, value too big (0x%08lX)"),
18706 _("invalid offset, value too big (0x%08lX)"),
18714 _("invalid offset, value too big (0x%08lX)"),
18722 _("invalid offset, value too big (0x%08lX)"),
18856 _("offset too big"));
18908 _("the offset 0x%08lX is not representable"),
18948 _("bad offset 0x%08lX (only 12 bits available for the magnitude)"),
18987 _("bad offset 0x%08lX (only 8 bits available for the magnitude)"),
19027 _("bad offset 0x%08lX (must be word-aligned)"),
19032 _("bad offset 0x%08lX (must be an 8-bit number of words)"),
19298 vtable entry to be used in the relocation's section offset. */