Lines Matching defs:shifted

348     unsigned shifted	: 1;  /* Shift applied to operation.  */
4325 inst.operands[i].shifted = 1;
5132 inst.operands[0].shifted = 1;
6305 if (inst.operands[i].shifted)
6331 if (inst.operands[i].immisreg && inst.operands[i].shifted)
6973 || inst.operands[1].immisreg || inst.operands[1].shifted
7560 || inst.operands[2].immisreg || inst.operands[2].shifted
8215 /* inst.operands[i] is a shifted-register operand; encode
8276 constraint (inst.operands[i].shifted && inst.operands[i].shift_kind != SHIFT_LSL,
8277 _("Thumb supports only LSL in shifted register indexing"));
8280 if (inst.operands[i].shifted)
8549 if (!inst.operands[2].shifted && inst.size_req != 4)
8586 constraint (inst.operands[2].shifted && inst.operands[2].immisreg,
8614 constraint (inst.operands[2].shifted, _("unshifted register required"));
8711 if (inst.operands[2].shifted)
8726 constraint (inst.operands[2].shifted
8742 constraint (!inst.operands[2].isreg || inst.operands[2].shifted,
8794 if (inst.operands[2].shifted)
8818 constraint (inst.operands[2].shifted
8834 constraint (!inst.operands[2].isreg || inst.operands[2].shifted,
9329 || inst.operands[1].immisreg || inst.operands[1].shifted
9374 && !inst.operands[1].shifted && !inst.operands[1].postind
9439 || inst.operands[1].postind || inst.operands[1].shifted
9452 || inst.operands[1].shifted
9569 || inst.operands[1].shifted)
9574 && !inst.operands[1].shifted
9604 else if (inst.operands[1].shifted && inst.operands[1].immisreg
9663 if (low_regs && inst.operands[1].shifted
9807 || inst.operands[1].shifted
9838 constraint (inst.operands[1].shifted
9852 constraint (!inst.operands[1].isreg || inst.operands[1].shifted,
10240 inst.operands[1].shifted = 1;
10378 || inst.operands[2].immisreg || inst.operands[2].shifted
10459 constraint (!half && inst.operands[0].shifted,
10460 _("instruction does not allow shifted index"));
18415 /* We are going to store value (shifted right by two) in the