Lines Matching defs:ctrl

362 	struct vmcb_ctrl *ctrl;
366 ctrl = svm_get_vmcb_ctrl(sc, vcpu);
367 return (ctrl->intercept[idx] & bitmask ? 1 : 0);
374 struct vmcb_ctrl *ctrl;
379 ctrl = svm_get_vmcb_ctrl(sc, vcpu);
380 oldval = ctrl->intercept[idx];
383 ctrl->intercept[idx] |= bitmask;
385 ctrl->intercept[idx] &= ~bitmask;
387 if (ctrl->intercept[idx] != oldval) {
390 "from %#x to %#x", idx, oldval, ctrl->intercept[idx]);
412 struct vmcb_ctrl *ctrl;
417 ctrl = svm_get_vmcb_ctrl(sc, vcpu);
420 ctrl->iopm_base_pa = iopm_base_pa;
421 ctrl->msrpm_base_pa = msrpm_base_pa;
424 ctrl->np_enable = 1;
425 ctrl->n_cr3 = np_pml4;
482 ctrl->asid = 0;
490 ctrl->v_intr_masking = 1;
493 ctrl->lbr_virt_en = 1;
732 struct vmcb_ctrl *ctrl;
740 ctrl = svm_get_vmcb_ctrl(svm_sc, vcpu);
743 info1 = ctrl->exitinfo1;
816 struct vmcb_ctrl *ctrl;
820 ctrl = &vmcb->ctrl;
856 inst_len = ctrl->inst_len;
857 inst_bytes = ctrl->inst_bytes;
891 struct vmcb_ctrl *ctrl;
893 ctrl = svm_get_vmcb_ctrl(sc, vcpu);
895 KASSERT((ctrl->eventinj & VMCB_EVENTINJ_VALID) == 0,
896 ("%s: event already pending %#lx", __func__, ctrl->eventinj));
914 ctrl->eventinj = vector | (intr_type << 8) | VMCB_EVENTINJ_VALID;
916 ctrl->eventinj |= VMCB_EVENTINJ_EC_VALID;
917 ctrl->eventinj |= (uint64_t)error << 32;
931 struct vmcb_ctrl *ctrl;
935 ctrl = svm_get_vmcb_ctrl(sc, vcpu);
938 vlapic_set_cr8(vlapic, ctrl->v_tpr);
941 KASSERT(ctrl->v_intr_vector == 0, ("%s: invalid "
942 "v_intr_vector %d", __func__, ctrl->v_intr_vector));
948 struct vmcb_ctrl *ctrl;
951 ctrl = svm_get_vmcb_ctrl(svm_sc, vcpu);
952 intinfo = ctrl->exitintinfo;
981 struct vmcb_ctrl *ctrl;
983 ctrl = svm_get_vmcb_ctrl(sc, vcpu);
985 if (ctrl->v_irq && ctrl->v_intr_vector == 0) {
986 KASSERT(ctrl->v_ign_tpr, ("%s: invalid v_ign_tpr", __func__));
993 ctrl->v_irq = 1;
994 ctrl->v_ign_tpr = 1;
995 ctrl->v_intr_vector = 0;
1003 struct vmcb_ctrl *ctrl;
1005 ctrl = svm_get_vmcb_ctrl(sc, vcpu);
1007 if (!ctrl->v_irq && ctrl->v_intr_vector == 0) {
1014 ctrl->v_irq = 0;
1015 ctrl->v_intr_vector = 0;
1023 struct vmcb_ctrl *ctrl;
1026 ctrl = svm_get_vmcb_ctrl(sc, vcpu);
1027 oldval = ctrl->intr_shadow;
1030 ctrl->intr_shadow = newval;
1039 struct vmcb_ctrl *ctrl;
1041 ctrl = svm_get_vmcb_ctrl(sc, vcpu);
1042 *val = ctrl->intr_shadow;
1282 struct vmcb_ctrl *ctrl;
1292 ctrl = &vmcb->ctrl;
1295 code = ctrl->exitcode;
1296 info1 = ctrl->exitinfo1;
1297 info2 = ctrl->exitinfo2;
1301 vmexit->inst_length = nrip_valid(code) ? ctrl->nrip - state->rip : 0;
1315 KASSERT((ctrl->eventinj & VMCB_EVENTINJ_VALID) == 0, ("%s: event "
1316 "injection valid bit is set %#lx", __func__, ctrl->eventinj));
1554 struct vmcb_ctrl *ctrl;
1562 ctrl = svm_get_vmcb_ctrl(sc, vcpu);
1568 ctrl->intr_shadow = 0;
1578 * during event delivery (i.e. ctrl->exitintinfo).
1594 } else if (ctrl->intr_shadow) {
1602 } else if (ctrl->eventinj & VMCB_EVENTINJ_VALID) {
1608 "eventinj %#lx", ctrl->eventinj);
1659 if (ctrl->intr_shadow) {
1666 if (ctrl->eventinj & VMCB_EVENTINJ_VALID) {
1668 "eventinj %#lx", vector, ctrl->eventinj);
1703 if (ctrl->v_tpr != v_tpr) {
1705 ctrl->v_tpr, v_tpr);
1706 ctrl->v_tpr = v_tpr;
1720 KASSERT((ctrl->eventinj & VMCB_EVENTINJ_VALID) != 0 ||
1721 (state->rflags & PSL_I) == 0 || ctrl->intr_shadow,
1724 ctrl->eventinj, ctrl->intr_shadow, state->rflags));
1752 struct vmcb_ctrl *ctrl;
1760 ctrl = svm_get_vmcb_ctrl(sc, vcpuid);
1799 ctrl->tlb_ctrl = VMCB_TLB_FLUSH_NOTHING;
1805 ctrl->tlb_ctrl = VMCB_TLB_FLUSH_GUEST; /* (b1) */
1813 KASSERT(ctrl->tlb_ctrl == VMCB_TLB_FLUSH_NOTHING,
1814 ("Invalid VMCB tlb_ctrl: %#x", ctrl->tlb_ctrl));
1829 ctrl->tlb_ctrl = VMCB_TLB_FLUSH_ALL;
1834 ctrl->asid = vcpustate->asid.num;
1842 ctrl->tlb_ctrl = VMCB_TLB_FLUSH_GUEST;
1846 KASSERT(ctrl->asid != 0, ("Guest ASID must be non-zero"));
1847 KASSERT(ctrl->asid == vcpustate->asid.num,
1848 ("ASID mismatch: %u/%u", ctrl->asid, vcpustate->asid.num));
1876 struct vmcb_ctrl *ctrl;
1888 ctrl = svm_get_vmcb_ctrl(svm_sc, vcpu);
1971 ctrl->vmcb_clean = vmcb_clean & ~vcpustate->dirty;
1973 VCPU_CTR1(vm, vcpu, "vmcb clean %#x", ctrl->vmcb_clean);