gas/config/tc-arm.c

509 #define REG_PC	15
3711   if (reg == REG_SP || reg == REG_PC)
4608 	  inst.operands[i].reg = REG_PC;
6013 	  if (inst.operands[i].isreg && inst.operands[i].reg == REG_PC)
6369       if (inst.operands[i].reg == REG_PC)
6467   inst.operands[1].reg = REG_PC;
6636      the same instruction but with REG_PC in the Rm field.  */
6638     inst.operands[1].reg = REG_PC;
6735       if (inst.operands[0].reg == REG_PC)
6758   if (inst.operands[0].reg == REG_PC)
6770   if (inst.operands[0].reg == REG_PC)
6888 	      && ((range & (1 << REG_PC)) == 0))
6968 	      || (inst.operands[1].reg == REG_PC),
7545 	      || (inst.operands[2].reg == REG_PC),
7925   constraint (inst.operands[0].reg != REG_PC, _("only r15 allowed here"));
8242   bfd_boolean is_pc = (inst.operands[i].reg == REG_PC);
8470 	      else if (Rd <= 7 && Rs == REG_PC && add && !flags)
8493 	      if (Rd == REG_PC)
8507 	      else if (Rs == REG_PC)
8585 		      || (Rs > 7 && Rs != REG_SP && Rs != REG_PC),
8865      the same instruction but with REG_PC in the Rm field.  */
8867     inst.operands[1].reg = REG_PC;
9012   /* ??? FIXME: Should add a hacky reloc here if reg is REG_PC.	 The reloc
9021   if (inst.operands[0].reg == REG_PC)
9372 		   || ((Rn == REG_PC || Rn == REG_SP) && opcode == T_MNEM_ldr)
9378 		  if (Rn == REG_PC)
9437   if (inst.operands[1].reg == REG_PC || inst.operands[1].reg == REG_SP)
9441       constraint (inst.operands[1].reg == REG_PC
9447       if (inst.operands[1].reg == REG_PC)
9557 	  && inst.operands[0].reg == REG_PC
10061 	       && (mask & ~0xff) == 1 << REG_PC))
18735 	    || (rs > 7 && rs != REG_SP && rs != REG_PC))
18757 	else if (rs == REG_PC || rs == REG_SP)
18763 	    newval = (rs == REG_PC ? T_OPCODE_ADD_PC : T_OPCODE_ADD_SP);