Lines Matching refs:status
319 ia32_mci_status_t status;
324 status = bank->mca_mci_status;
325 mc8 = status.bits_mc8;
330 i, IA32_MCi_STATUS(i), status.u64, IF(!status.bits.val, "in"));
331 if (!status.bits.val)
354 IF(status.bits.pcc, " Processor context corrupt\n"),
355 IF(status.bits.addrv, " ADDR register valid\n"),
356 IF(status.bits.miscv, " MISC register valid\n"),
357 IF(status.bits.en, " Error enabled\n"),
358 IF(status.bits.uc, " Uncorrected error\n"),
359 IF(status.bits.over, " Error overflow\n"));
360 if (status.bits.addrv)
364 if (status.bits.miscv) {
393 ia32_mci_status_t status;
396 status = bank->mca_mci_status;
399 i, IA32_MCi_STATUS(i), status.u64, IF(!status.bits.val, "in"));
400 if (!status.bits.val)
405 status.bits.mca_error);
408 status.bits.model_specific_error);
412 status.bits.other_information);
414 int threshold = status.bits_tes_p.threshold;
417 " Threshold-based status: %s\n",
418 status.bits_tes_p.other_information,
419 (status.bits_tes_p.uc == 0) ?
427 IF(status.bits_tes_p.ar, " Recovery action reqd\n"),
428 IF(status.bits_tes_p.s, " Signaling UCR error\n"));
432 IF(status.bits.pcc, " Processor context corrupt\n"),
433 IF(status.bits.addrv, " ADDR register valid\n"),
434 IF(status.bits.miscv, " MISC register valid\n"),
435 IF(status.bits.en, " Error enabled\n"),
436 IF(status.bits.uc, " Uncorrected error\n"),
437 IF(status.bits.over, " Error overflow\n"));
438 if (status.bits.addrv)
442 if (status.bits.miscv)
525 " threshold-based error status present\n"),
537 ia32_mcg_status_t status;
543 kdb_printf("no machine-check status reported\n");
550 status = mcsp->mca_mcg_status;
552 "machine-check status 0x%016qx:\n%s%s%s", status.u64,
553 IF(status.bits.ripv, " restart IP valid\n"),
554 IF(status.bits.eipv, " error IP valid\n"),
555 IF(status.bits.mcip, " machine-check in progress\n"));