osfmk/i386/cpuid.c

272 	uint32_t	reg[4];
326 		reg[eax] = 4;		/* cpuid request 4 */
327 		reg[ecx] = index;	/* index starting at 0 */
328 		cpuid(reg);
329 		DBG("cpuid(4) index=%d eax=0x%x\n", index, reg[eax]);
330 		cache_type = bitfield32(reg[eax], 4, 0);
333 		cache_level  		= bitfield32(reg[eax],  7,  5);
334 		cache_sharing	 	= bitfield32(reg[eax], 25, 14) + 1;
336 					= bitfield32(reg[eax], 31, 26) + 1;
337 		cache_linesize		= bitfield32(reg[ebx], 11,  0) + 1;
338 		cache_partitions	= bitfield32(reg[ebx], 21, 12) + 1;
339 		cache_associativity	= bitfield32(reg[ebx], 31, 22) + 1;
340 		cache_sets 		= bitfield32(reg[ecx], 31,  0) + 1;
500 	uint32_t	reg[4];
506 	cpuid_fn(0, reg);
507 	info_p->cpuid_max_basic = reg[eax];
508 	bcopy((char *)&reg[ebx], &info_p->cpuid_vendor[0], 4); /* ug */
509 	bcopy((char *)&reg[ecx], &info_p->cpuid_vendor[8], 4);
510 	bcopy((char *)&reg[edx], &info_p->cpuid_vendor[4], 4);
514 	cpuid_fn(0x80000000, reg);
515 	info_p->cpuid_max_ext = reg[eax];
523 		cpuid_fn(0x80000002, reg);
524 		bcopy((char *)reg, &str[0], 16);
525 		cpuid_fn(0x80000003, reg);
526 		bcopy((char *)reg, &str[16], 16);
527 		cpuid_fn(0x80000004, reg);
528 		bcopy((char *)reg, &str[32], 16);
549 		cpuid_fn(0x80000006, reg);
550 		info_p->cpuid_cache_linesize   = bitfield32(reg[ecx], 7, 0);
551 		assoc = bitfield32(reg[ecx],15,12);
566 		info_p->cpuid_cache_size       = bitfield32(reg[ecx],31,16);
567 		cpuid_fn(0x80000008, reg);
569 						 bitfield32(reg[eax], 7, 0);
571 						 bitfield32(reg[eax],15, 8);
580 	cpuid_fn(1, reg);
583 	info_p->cpuid_signature = reg[eax];
584 	info_p->cpuid_stepping  = bitfield32(reg[eax],  3,  0);
585 	info_p->cpuid_model     = bitfield32(reg[eax],  7,  4);
586 	info_p->cpuid_family    = bitfield32(reg[eax], 11,  8);
587 	info_p->cpuid_type      = bitfield32(reg[eax], 13, 12);
588 	info_p->cpuid_extmodel  = bitfield32(reg[eax], 19, 16);
589 	info_p->cpuid_extfamily = bitfield32(reg[eax], 27, 20);
590 	info_p->cpuid_brand     = bitfield32(reg[ebx],  7,  0);
591 	info_p->cpuid_features  = quad(reg[ecx], reg[edx]);
604 				bitfield32(reg[ebx], 23, 16);
609 		cpuid_fn(0x80000001, reg);
611 				quad(reg[ecx], reg[edx]);
633 		cpuid_fn(0x80000007, reg);
635 				reg[edx] & (uint32_t)CPUID_EXTFEATURE_TSCI;
646 		cpuid_fn(5, reg);
647 		cmp->linesize_min = reg[eax];
648 		cmp->linesize_max = reg[ebx];
649 		cmp->extensions   = reg[ecx];
650 		cmp->sub_Cstates  = reg[edx];
666 		cpuid_fn(6, reg);
667 		ctp->sensor 		  = bitfield32(reg[eax], 0, 0);
668 		ctp->dynamic_acceleration = bitfield32(reg[eax], 1, 1);
669 		ctp->invariant_APIC_timer = bitfield32(reg[eax], 2, 2);
670 		ctp->core_power_limits    = bitfield32(reg[eax], 4, 4);
671 		ctp->fine_grain_clock_mod = bitfield32(reg[eax], 5, 5);
672 		ctp->package_thermal_intr = bitfield32(reg[eax], 6, 6);
673 		ctp->thresholds		  = bitfield32(reg[ebx], 3, 0);
674 		ctp->ACNT_MCNT		  = bitfield32(reg[ecx], 0, 0);
675 		ctp->hardware_feedback	  = bitfield32(reg[ecx], 1, 1);
676 		ctp->energy_policy	  = bitfield32(reg[ecx], 3, 3);
698 		cpuid_fn(0xa, reg);
699 		capp->version	    = bitfield32(reg[eax],  7,  0);
700 		capp->number	    = bitfield32(reg[eax], 15,  8);
701 		capp->width	    = bitfield32(reg[eax], 23, 16);
702 		capp->events_number = bitfield32(reg[eax], 31, 24);
703 		capp->events	    = reg[ebx];
704 		capp->fixed_number  = bitfield32(reg[edx],  4,  0);
705 		capp->fixed_width   = bitfield32(reg[edx], 12,  5);
737 		cpuid_fn(0x7, reg);
738 		info_p->cpuid_leaf7_features = reg[ebx];
741 		DBG("  EBX           : 0x%x\n", reg[ebx]);
1106 	uint32_t	reg[4];
1117 	cpuid_fn(0x40000000, reg);
1118 	max_vmm_leaf = reg[eax];
1119 	bcopy((char *)&reg[ebx], &info_p->cpuid_vmm_vendor[0], 4);
1120 	bcopy((char *)&reg[ecx], &info_p->cpuid_vmm_vendor[4], 4);
1121 	bcopy((char *)&reg[edx], &info_p->cpuid_vmm_vendor[8], 4);
1133 		cpuid_fn(0x40000010, reg);
1135 		info_p->cpuid_vmm_tsc_frequency = reg[eax];
1136 		info_p->cpuid_vmm_bus_frequency = reg[ebx];