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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/sh64/

Lines Matching refs:index

50 #define GET_H_GR(index) ((((index) == (63))) ? (0) : (CPU (h_gr[index])))
51 #define SET_H_GR(index, x) \
53 if ((((index)) != (63))) {\
54 CPU (h_gr[(index)]) = (x);\
61 #define GET_H_CR(index) ((((index) == (0))) ? (ZEXTSIDI (CPU (h_sr))) : (CPU (h_cr[index])))
62 #define SET_H_CR(index, x) \
64 if ((((index)) == (0))) {\
67 CPU (h_cr[(index)]) = (x);\
84 #define GET_H_FSD(index) ((GET_H_PRBIT ()) ? (GET_H_DRC (index)) : (CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), CPU (h_fr[index]))))
85 #define SET_H_FSD(index, x) \
88 SET_H_DRC ((index), (x));\
90 SET_H_FRC ((index), CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), (x)));\
95 #define GET_H_FMOV(index) ((NOTBI (GET_H_SZBIT ())) ? (CGEN_CPU_FPU (current_cpu)->ops->fextsfdf (CGEN_CPU_FPU (current_cpu), GET_H_FRC (index))) : (((((((index) & (1))) == (1))) ? (GET_H_XD (((index) & ((~ (1)))))) : (GET_H_DR (index)))))
96 #define SET_H_FMOV(index, x) \
99 SET_H_FRC ((index), CGEN_CPU_FPU (current_cpu)->ops->ftruncdfsf (CGEN_CPU_FPU (current_cpu), (x)));\
101 if ((((((index)) & (1))) == (1))) {\
102 SET_H_XD ((((index)) & ((~ (1)))), (x));\
104 SET_H_DR ((index), (x));\
125 #define GET_H_GRC(index) ANDDI (CPU (h_gr[index]), ZEXTSIDI (0xffffffff))
126 #define SET_H_GRC(index, x) \
128 CPU (h_gr[(index)]) = EXTSIDI ((x));\
160 #define GET_H_FP(index) CPU (h_fr[index])
161 #define SET_H_FP(index, x) \
163 CPU (h_fr[(index)]) = (x);\
165 #define GET_H_FV(index) CPU (h_fr[index])
166 #define SET_H_FV(index, x) \
168 CPU (h_fr[(index)]) = (x);\
170 #define GET_H_FMTX(index) CPU (h_fr[index])
171 #define SET_H_FMTX(index, x) \
173 CPU (h_fr[(index)]) = (x);\
175 #define GET_H_DR(index) SUBWORDDIDF (ORDI (SLLDI (ZEXTSIDI (SUBWORDSFSI (CPU (h_fr[index]))), 32), ZEXTSIDI (SUBWORDSFSI (CPU (h_fr[((index) + (1))])))))
176 #define SET_H_DR(index, x) \
179 CPU (h_fr[(index)]) = SUBWORDSISF (SUBWORDDFSI ((x), 0));\
180 CPU (h_fr[(((index)) + (1))]) = SUBWORDSISF (SUBWORDDFSI ((x), 1));\
188 #define GET_H_FRC(index) CPU (h_fr[((((16) * (GET_H_FRBIT ()))) + (index))])
189 #define SET_H_FRC(index, x) \
191 CPU (h_fr[((((16) * (GET_H_FRBIT ()))) + ((index)))]) = (x);\
193 #define GET_H_DRC(index) GET_H_DR (((((16) * (GET_H_FRBIT ()))) + (index)))
194 #define SET_H_DRC(index, x) \
196 SET_H_DR (((((16) * (GET_H_FRBIT ()))) + ((index))), (x));\
198 #define GET_H_XF(index) CPU (h_fr[((((16) * (NOTBI (GET_H_FRBIT ())))) + (index))])
199 #define SET_H_XF(index, x) \
201 CPU (h_fr[((((16) * (NOTBI (GET_H_FRBIT ())))) + ((index)))]) = (x);\
203 #define GET_H_XD(index) GET_H_DR (((((16) * (NOTBI (GET_H_FRBIT ())))) + (index)))
204 #define SET_H_XD(index, x) \
206 SET_H_DR (((((16) * (NOTBI (GET_H_FRBIT ())))) + ((index))), (x));\
208 #define GET_H_FVC(index) CPU (h_fr[((((16) * (GET_H_FRBIT ()))) + (index))])
209 #define SET_H_FVC(index, x) \
211 CPU (h_fr[((((16) * (GET_H_FRBIT ()))) + ((index)))]) = (x);\