Lines Matching refs:INT_QUAD_BASE
134 #define INT_QUAD_BASE (INT_TRI_BASE + 32)
135 #define INT_SNOR (INT_QUAD_BASE + 0)
136 #define INT_USB3 (INT_QUAD_BASE + 1)
137 #define INT_PCIE_INTR (INT_QUAD_BASE + 2)
138 #define INT_PCIE_MSI (INT_QUAD_BASE + 3)
139 #define INT_QUAD_RES_4 (INT_QUAD_BASE + 4)
140 #define INT_QUAD_RES_5 (INT_QUAD_BASE + 5)
141 #define INT_QUAD_RES_6 (INT_QUAD_BASE + 6)
142 #define INT_QUAD_RES_7 (INT_QUAD_BASE + 7)
143 #define INT_APB_DMA_CH0 (INT_QUAD_BASE + 8)
144 #define INT_APB_DMA_CH1 (INT_QUAD_BASE + 9)
145 #define INT_APB_DMA_CH2 (INT_QUAD_BASE + 10)
146 #define INT_APB_DMA_CH3 (INT_QUAD_BASE + 11)
147 #define INT_APB_DMA_CH4 (INT_QUAD_BASE + 12)
148 #define INT_APB_DMA_CH5 (INT_QUAD_BASE + 13)
149 #define INT_APB_DMA_CH6 (INT_QUAD_BASE + 14)
150 #define INT_APB_DMA_CH7 (INT_QUAD_BASE + 15)
151 #define INT_APB_DMA_CH8 (INT_QUAD_BASE + 16)
152 #define INT_APB_DMA_CH9 (INT_QUAD_BASE + 17)
153 #define INT_APB_DMA_CH10 (INT_QUAD_BASE + 18)
154 #define INT_APB_DMA_CH11 (INT_QUAD_BASE + 19)
155 #define INT_APB_DMA_CH12 (INT_QUAD_BASE + 20)
156 #define INT_APB_DMA_CH13 (INT_QUAD_BASE + 21)
157 #define INT_APB_DMA_CH14 (INT_QUAD_BASE + 22)
158 #define INT_APB_DMA_CH15 (INT_QUAD_BASE + 23)
159 #define INT_QUAD_RES_24 (INT_QUAD_BASE + 24)
160 #define INT_QUAD_RES_25 (INT_QUAD_BASE + 25)
161 #define INT_QUAD_RES_26 (INT_QUAD_BASE + 26)
162 #define INT_QUAD_RES_27 (INT_QUAD_BASE + 27)
163 #define INT_QUAD_RES_28 (INT_QUAD_BASE + 28)
164 #define INT_QUAD_RES_29 (INT_QUAD_BASE + 29)
165 #define INT_QUAD_RES_30 (INT_QUAD_BASE + 30)
166 #define INT_QUAD_RES_31 (INT_QUAD_BASE + 31)
168 #define INT_GPIO_BASE (INT_QUAD_BASE + 32)