Lines Matching refs:INT_PRI_BASE
29 #define INT_PRI_BASE (INT_GIC_BASE + 32)
30 #define INT_TMR1 (INT_PRI_BASE + 0)
31 #define INT_TMR2 (INT_PRI_BASE + 1)
32 #define INT_RTC (INT_PRI_BASE + 2)
33 #define INT_I2S2 (INT_PRI_BASE + 3)
34 #define INT_SHR_SEM_INBOX_IBF (INT_PRI_BASE + 4)
35 #define INT_SHR_SEM_INBOX_IBE (INT_PRI_BASE + 5)
36 #define INT_SHR_SEM_OUTBOX_IBF (INT_PRI_BASE + 6)
37 #define INT_SHR_SEM_OUTBOX_IBE (INT_PRI_BASE + 7)
38 #define INT_VDE_UCQ_ERROR (INT_PRI_BASE + 8)
39 #define INT_VDE_SYNC_TOKEN (INT_PRI_BASE + 9)
40 #define INT_VDE_BSE_V (INT_PRI_BASE + 10)
41 #define INT_VDE_BSE_A (INT_PRI_BASE + 11)
42 #define INT_VDE_SXE (INT_PRI_BASE + 12)
43 #define INT_I2S1 (INT_PRI_BASE + 13)
44 #define INT_SDMMC1 (INT_PRI_BASE + 14)
45 #define INT_SDMMC2 (INT_PRI_BASE + 15)
46 #define INT_XIO (INT_PRI_BASE + 16)
47 #define INT_VDE (INT_PRI_BASE + 17)
48 #define INT_AVP_UCQ (INT_PRI_BASE + 18)
49 #define INT_SDMMC3 (INT_PRI_BASE + 19)
50 #define INT_USB (INT_PRI_BASE + 20)
51 #define INT_USB2 (INT_PRI_BASE + 21)
52 #define INT_PRI_RES_22 (INT_PRI_BASE + 22)
53 #define INT_EIDE (INT_PRI_BASE + 23)
54 #define INT_NANDFLASH (INT_PRI_BASE + 24)
55 #define INT_VCP (INT_PRI_BASE + 25)
56 #define INT_APB_DMA (INT_PRI_BASE + 26)
57 #define INT_AHB_DMA (INT_PRI_BASE + 27)
58 #define INT_GNT_0 (INT_PRI_BASE + 28)
59 #define INT_GNT_1 (INT_PRI_BASE + 29)
60 #define INT_OWR (INT_PRI_BASE + 30)
61 #define INT_SDMMC4 (INT_PRI_BASE + 31)
64 #define INT_SEC_BASE (INT_PRI_BASE + 32)