Lines Matching refs:U32
125 U32 Doorbell; /* 0x00 */
126 U32 WriteSequence; /* 0x04 */
127 U32 HostDiagnostic; /* 0x08 */
128 U32 Reserved1; /* 0x0C */
129 U32 DiagRWData; /* 0x10 */
130 U32 DiagRWAddressLow; /* 0x14 */
131 U32 DiagRWAddressHigh; /* 0x18 */
132 U32 Reserved2[5]; /* 0x1C */
133 U32 HostInterruptStatus; /* 0x30 */
134 U32 HostInterruptMask; /* 0x34 */
135 U32 DCRData; /* 0x38 */
136 U32 DCRAddress; /* 0x3C */
137 U32 Reserved3[2]; /* 0x40 */
138 U32 ReplyFreeHostIndex; /* 0x48 */
139 U32 Reserved4[8]; /* 0x4C */
140 U32 ReplyPostHostIndex; /* 0x6C */
141 U32 Reserved5; /* 0x70 */
142 U32 HCBSize; /* 0x74 */
143 U32 HCBAddressLow; /* 0x78 */
144 U32 HCBAddressHigh; /* 0x7C */
145 U32 Reserved6[16]; /* 0x80 */
146 U32 RequestDescriptorPostLow; /* 0xC0 */
147 U32 RequestDescriptorPostHigh; /* 0xC4 */
148 U32 Reserved7[14]; /* 0xC8 */
373 U32 DescriptorTypeDependent2; /* 0x04 */
396 U32 ReplyFrameAddress; /* 0x04 */
455 U32 Reserved; /* 0x04 */
682 U32 IOCLogInfo; /* 0x10 */
700 U32 Word;
725 U32 FlagsLength;
726 U32 Address;
732 U32 FlagsLength;
739 U32 FlagsLength;
742 U32 Address32;
758 U32 Address;
778 U32 Address32;
795 U32 TransactionContext[1];
796 U32 TransactionDetails[1];
806 U32 TransactionContext[2];
807 U32 TransactionDetails[1];
817 U32 TransactionContext[3];
818 U32 TransactionDetails[1];
828 U32 TransactionContext[4];
829 U32 TransactionDetails[1];
841 U32 TransactionContext32[1];
842 U32 TransactionContext64[2];
843 U32 TransactionContext96[3];
844 U32 TransactionContext128[4];
846 U32 TransactionDetails[1];
952 #define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
982 U32 Address;
983 U32 FlagsLength;
990 U32 Length;
1067 #define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)