Lines Matching defs:mtr
283 #define MTR_DIMMS_PRESENT(mtr) ((mtr) & (1 << 10))
284 #define MTR_DIMMS_ETHROTTLE(mtr) ((mtr) & (1 << 9))
285 #define MTR_DRAM_WIDTH(mtr) (((mtr) & (1 << 8)) ? 8 : 4)
286 #define MTR_DRAM_BANKS(mtr) (((mtr) & (1 << 6)) ? 8 : 4)
287 #define MTR_DRAM_BANKS_ADDR_BITS(mtr) ((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2)
288 #define MTR_DIMM_RANK(mtr) (((mtr) >> 5) & 0x1)
289 #define MTR_DIMM_RANK_ADDR_BITS(mtr) (MTR_DIMM_RANK(mtr) ? 2 : 1)
290 #define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3)
291 #define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13)
292 #define MTR_DIMM_COLS(mtr) ((mtr) & 0x3)
293 #define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10)
848 int mtr;
863 mtr = pvt->b0_mtr[n];
865 mtr = pvt->b1_mtr[n];
867 return mtr;
872 static void decode_mtr(int slot_row, u16 mtr)
876 ans = MTR_DIMMS_PRESENT(mtr);
878 debugf2("\tMTR%d=0x%x: DIMMs are %s\n", slot_row, mtr,
883 debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
886 MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled");
888 debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
889 debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANK(mtr) ? "double" : "single");
890 debugf2("\t\tNUMROW: %s\n", numrow_toString[MTR_DIMM_ROWS(mtr)]);
891 debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]);
897 int mtr;
901 mtr = determine_mtr(pvt, csrow, channel);
902 if (MTR_DIMMS_PRESENT(mtr)) {
909 addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr);
911 addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr);
913 addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr);
915 addrBits += MTR_DIMM_RANK(mtr);
1136 int mtr;
1154 mtr = determine_mtr(pvt, csrow, 0);
1157 if (!MTR_DIMMS_PRESENT(mtr))
1176 if (MTR_DRAM_WIDTH(mtr))