Lines Matching refs:nmk_chip
50 static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip,
56 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
57 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
62 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
63 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
66 static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
72 slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
77 writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
80 static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
86 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
91 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
94 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
96 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
99 static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
102 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
105 static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
130 dev_dbg(nmk_chip->chip.dev, "pin %d: af %s, pull %s, slpm %s\n",
133 __nmk_gpio_make_input(nmk_chip, offset);
134 __nmk_gpio_set_pull(nmk_chip, offset, pull);
135 __nmk_gpio_set_slpm(nmk_chip, offset, slpm);
136 __nmk_gpio_set_mode(nmk_chip, offset, af);
155 struct nmk_gpio_chip *nmk_chip;
159 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
160 if (!nmk_chip)
163 spin_lock_irqsave(&nmk_chip->lock, flags);
164 __nmk_config_pin(nmk_chip, gpio - nmk_chip->chip.base, cfg);
165 spin_unlock_irqrestore(&nmk_chip->lock, flags);
206 struct nmk_gpio_chip *nmk_chip;
209 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
210 if (!nmk_chip)
213 spin_lock_irqsave(&nmk_chip->lock, flags);
214 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode);
215 spin_unlock_irqrestore(&nmk_chip->lock, flags);
235 struct nmk_gpio_chip *nmk_chip;
238 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
239 if (!nmk_chip)
242 spin_lock_irqsave(&nmk_chip->lock, flags);
243 __nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull);
244 spin_unlock_irqrestore(&nmk_chip->lock, flags);
252 struct nmk_gpio_chip *nmk_chip;
255 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
256 if (!nmk_chip)
259 spin_lock_irqsave(&nmk_chip->lock, flags);
260 __nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip->chip.base, gpio_mode);
261 spin_unlock_irqrestore(&nmk_chip->lock, flags);
269 struct nmk_gpio_chip *nmk_chip;
272 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
273 if (!nmk_chip)
276 bit = 1 << (gpio - nmk_chip->chip.base);
278 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
279 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
295 struct nmk_gpio_chip *nmk_chip;
298 nmk_chip = get_irq_chip_data(irq);
299 if (!nmk_chip)
301 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
309 static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
319 if (nmk_chip->edge_rising & bitmask) {
320 reg = readl(nmk_chip->addr + rimsc);
325 writel(reg, nmk_chip->addr + rimsc);
327 if (nmk_chip->edge_falling & bitmask) {
328 reg = readl(nmk_chip->addr + fimsc);
333 writel(reg, nmk_chip->addr + fimsc);
341 struct nmk_gpio_chip *nmk_chip;
346 nmk_chip = get_irq_chip_data(irq);
348 if (!nmk_chip)
351 spin_lock_irqsave(&nmk_chip->lock, flags);
352 __nmk_gpio_irq_modify(nmk_chip, gpio, which, enable);
353 spin_unlock_irqrestore(&nmk_chip->lock, flags);
379 struct nmk_gpio_chip *nmk_chip;
384 nmk_chip = get_irq_chip_data(irq);
386 if (!nmk_chip)
394 spin_lock_irqsave(&nmk_chip->lock, flags);
397 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);
400 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false);
402 nmk_chip->edge_rising &= ~bitmask;
404 nmk_chip->edge_rising |= bitmask;
406 nmk_chip->edge_falling &= ~bitmask;
408 nmk_chip->edge_falling |= bitmask;
411 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true);
414 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);
416 spin_unlock_irqrestore(&nmk_chip->lock, flags);
432 struct nmk_gpio_chip *nmk_chip;
446 nmk_chip = get_irq_data(irq);
447 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
448 while ( (pending = readl(nmk_chip->addr + NMK_GPIO_IS)) ) {
456 static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
461 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
466 set_irq_chip_data(i, nmk_chip);
469 set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
470 set_irq_data(nmk_chip->parent_irq, nmk_chip);
477 struct nmk_gpio_chip *nmk_chip =
480 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
486 struct nmk_gpio_chip *nmk_chip =
490 return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
496 struct nmk_gpio_chip *nmk_chip =
501 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
503 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
509 struct nmk_gpio_chip *nmk_chip =
512 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
520 struct nmk_gpio_chip *nmk_chip =
523 return NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base) + offset;
540 struct nmk_gpio_chip *nmk_chip;
576 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
577 if (!nmk_chip) {
582 * The virt address in nmk_chip->addr is in the nomadik register space,
585 nmk_chip->clk = clk;
586 nmk_chip->addr = io_p2v(res->start);
587 nmk_chip->chip = nmk_gpio_template;
588 nmk_chip->parent_irq = irq;
589 spin_lock_init(&nmk_chip->lock);
591 chip = &nmk_chip->chip;
597 ret = gpiochip_add(&nmk_chip->chip);
601 platform_set_drvdata(dev, nmk_chip);
603 nmk_gpio_init_irq(nmk_chip);
606 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
610 kfree(nmk_chip);