#
70fe2385 |
|
03-Jan-2024 |
Simon Glass <sjg@chromium.org> |
fdt: Allow the devicetree to come from a bloblist Standard passage provides for a bloblist to be passed from one firmware phase to the next. That can be used to pass the devicetree along as well. Add an option to support this. Tests for this will be added as part of the Universal Payload work. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> |
#
53c5093b |
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12-Mar-2023 |
Johan Jonker <jbx6244@gmail.com> |
include: fdtdec: decouple fdt_addr_t and phys_addr_t size The DT specification supports CPUs with both 32-bit and 64-bit addressing capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions with a 64-bit reg property. These partitions synced from Linux end up with the wrong offset and sizes when only the lower 32-bit is passed. Decouple the fdt_addr_t and phys_addr_t size as they don't necessary match. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
1eb09081 |
|
22-Jan-2023 |
Samuel Holland <samuel@sholland.org> |
mtd: nand: sunxi: Convert from fdtdec to ofnode As a first step toward converting this driver to the driver model, use the ofnode abstraction to replace direct references to the FDT blob. Using ofnode_read_u32_index removes an extra pair of loops and makes the allwinner,rb property optional, matching the devicetree binding. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c662d0b7 |
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21-Dec-2022 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid exporting fdtdec_prepare_fdt() This function is not used outside this file. Make it static. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
545026a5 |
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16-Feb-2022 |
Tom Rini <trini@konsulko.com> |
fdtdec.h: Remove gurads around fdtdec_resetup function This function has not been conditionally compiled for some time, so remove the incorrect guards around the declaration. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
9876ae7d |
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04-Jan-2022 |
Patrice Chotard <patrice.chotard@foss.st.com> |
dm: Fix OF_BAD_ADDR definition When OF_LIVE flag is enabled on a 64 bits platform, there is an issue when dev_read_addr() is called and need to perform an address translation using __of_translate_address(). In case of error, __of_translate_address() return's value is OF_BAD_ADDR (wich is defined in include/dm/of.h to ((u64)-1) = 0xffffffffffffffff). The return value of dev_read_addr() is often compared to FDT_ADDR_T_NONE which is defined as (-1U) = 0xffffffff. In this case the comparison is always false. To fix this issue, define FDT_ADDR_T_NONE to (ulong)(-1) in case of AARCH64. Update accordingly related tests. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
185f812c |
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19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
f350f677 |
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12-Jan-2022 |
Simon Glass <sjg@chromium.org> |
fdt: Drop SPL_BUILD macro This old macro is not needed anymore since we can use IS_ENABLED() now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
39605c6e |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Record where the devicetree came from Keep track of where the devicetree came from, so we can report this later. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
98550343 |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Don't call board_fdt_blob_setup() without OF_BOARD At present this override function is called even when OF_BOARD is not enabled. This makes it impossible to disable this feature and in fact makes the OF_BOARD option useless. Reinstate its intended purpose, so that it is possible to switch between the appended devicetree and one provided by the board's custom function. A follower patch adds warnings for this scenario, but for now we don't have a Kconfig that definitively tells us that OF_BOARD should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d893b8ad |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Drop CONFIG_SPL_BUILD check in fdtdec_setup() Move this to the header file to clean up the C code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d6f8ab30 |
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11-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
treewide: Remove OF_PRIOR_STAGE The previous patches removed OF_PRIOR_STAGE from the last consumers of the Kconfig option. Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
b9aad375 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support reserved-memory flags Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
90194876 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
46cb0678 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support compatible string list for reserved memory Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
4bf88ba7 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support retrieving the name of a carveout When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
7de8bd03 |
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07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e19f4aa |
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18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
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12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
|
19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
|
09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marex@denx.de> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marex@denx.de> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marex@denx.de> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
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12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
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90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
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19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
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81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <masahiroy@kernel.org> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
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eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
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c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
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f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
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2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
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43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
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623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <masahiroy@kernel.org> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
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6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
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4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
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920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
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da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
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6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
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69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
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f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
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e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
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f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
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3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
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129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
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b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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0f925822 |
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11-Aug-2015 |
Masahiro Yamada <masahiroy@kernel.org> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <masahiroy@kernel.org> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <masahiroy@kernel.org> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
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28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
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7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
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af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
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5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
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9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
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0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
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3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
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11-Mar-2015 |
Masahiro Yamada <masahiroy@kernel.org> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <masahiroy@kernel.org> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
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b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
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01-Dec-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <masahiroy@kernel.org> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
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1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fdt
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#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
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#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
|
20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
|
24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
45a4d4d3 |
|
27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
|
12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
|
12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
|
04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
|
#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
|
04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
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07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
|
25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@konsulko.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
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11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
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29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
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31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
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17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
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03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
53c5093b |
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12-Mar-2023 |
Johan Jonker <jbx6244@gmail.com> |
include: fdtdec: decouple fdt_addr_t and phys_addr_t size The DT specification supports CPUs with both 32-bit and 64-bit addressing capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions with a 64-bit reg property. These partitions synced from Linux end up with the wrong offset and sizes when only the lower 32-bit is passed. Decouple the fdt_addr_t and phys_addr_t size as they don't necessary match. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
1eb09081 |
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22-Jan-2023 |
Samuel Holland <samuel@sholland.org> |
mtd: nand: sunxi: Convert from fdtdec to ofnode As a first step toward converting this driver to the driver model, use the ofnode abstraction to replace direct references to the FDT blob. Using ofnode_read_u32_index removes an extra pair of loops and makes the allwinner,rb property optional, matching the devicetree binding. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> |
#
c662d0b7 |
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21-Dec-2022 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid exporting fdtdec_prepare_fdt() This function is not used outside this file. Make it static. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
545026a5 |
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16-Feb-2022 |
Tom Rini <trini@konsulko.com> |
fdtdec.h: Remove gurads around fdtdec_resetup function This function has not been conditionally compiled for some time, so remove the incorrect guards around the declaration. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
9876ae7d |
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04-Jan-2022 |
Patrice Chotard <patrice.chotard@foss.st.com> |
dm: Fix OF_BAD_ADDR definition When OF_LIVE flag is enabled on a 64 bits platform, there is an issue when dev_read_addr() is called and need to perform an address translation using __of_translate_address(). In case of error, __of_translate_address() return's value is OF_BAD_ADDR (wich is defined in include/dm/of.h to ((u64)-1) = 0xffffffffffffffff). The return value of dev_read_addr() is often compared to FDT_ADDR_T_NONE which is defined as (-1U) = 0xffffffff. In this case the comparison is always false. To fix this issue, define FDT_ADDR_T_NONE to (ulong)(-1) in case of AARCH64. Update accordingly related tests. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
185f812c |
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19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
f350f677 |
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12-Jan-2022 |
Simon Glass <sjg@chromium.org> |
fdt: Drop SPL_BUILD macro This old macro is not needed anymore since we can use IS_ENABLED() now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
39605c6e |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Record where the devicetree came from Keep track of where the devicetree came from, so we can report this later. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
98550343 |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Don't call board_fdt_blob_setup() without OF_BOARD At present this override function is called even when OF_BOARD is not enabled. This makes it impossible to disable this feature and in fact makes the OF_BOARD option useless. Reinstate its intended purpose, so that it is possible to switch between the appended devicetree and one provided by the board's custom function. A follower patch adds warnings for this scenario, but for now we don't have a Kconfig that definitively tells us that OF_BOARD should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d893b8ad |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Drop CONFIG_SPL_BUILD check in fdtdec_setup() Move this to the header file to clean up the C code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d6f8ab30 |
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11-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
treewide: Remove OF_PRIOR_STAGE The previous patches removed OF_PRIOR_STAGE from the last consumers of the Kconfig option. Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
b9aad375 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support reserved-memory flags Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
90194876 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
46cb0678 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support compatible string list for reserved memory Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
4bf88ba7 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support retrieving the name of a carveout When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
7de8bd03 |
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07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e19f4aa |
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18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
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12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marex@denx.de> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
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ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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118f4d45 |
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04-Mar-2019 |
Marek Vasut <marex@denx.de> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marex@denx.de> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
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#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
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12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.prasad.paladugu@amd.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
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19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
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eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
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c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
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43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
|
08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
|
12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
|
04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
|
16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
|
11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
|
30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
|
31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
|
19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
|
18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
|
14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
|
11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
|
29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
|
05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
|
19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
|
18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
|
05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
|
17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
|
17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
|
06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
|
22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
|
03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
|
25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
|
04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
|
26-Feb-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
|
19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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88342103 |
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01-Dec-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fdt
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#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
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1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fdt
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#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
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bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
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3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
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65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
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77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
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a9f04d49 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
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26403871 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
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f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
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dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
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9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
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#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
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20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
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15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
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#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
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08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
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14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
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07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
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17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
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17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@konsulko.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
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11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
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29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
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31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
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17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
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03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
|
24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c662d0b7 |
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21-Dec-2022 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid exporting fdtdec_prepare_fdt() This function is not used outside this file. Make it static. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
545026a5 |
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16-Feb-2022 |
Tom Rini <trini@konsulko.com> |
fdtdec.h: Remove gurads around fdtdec_resetup function This function has not been conditionally compiled for some time, so remove the incorrect guards around the declaration. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
9876ae7d |
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04-Jan-2022 |
Patrice Chotard <patrice.chotard@foss.st.com> |
dm: Fix OF_BAD_ADDR definition When OF_LIVE flag is enabled on a 64 bits platform, there is an issue when dev_read_addr() is called and need to perform an address translation using __of_translate_address(). In case of error, __of_translate_address() return's value is OF_BAD_ADDR (wich is defined in include/dm/of.h to ((u64)-1) = 0xffffffffffffffff). The return value of dev_read_addr() is often compared to FDT_ADDR_T_NONE which is defined as (-1U) = 0xffffffff. In this case the comparison is always false. To fix this issue, define FDT_ADDR_T_NONE to (ulong)(-1) in case of AARCH64. Update accordingly related tests. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
185f812c |
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19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
f350f677 |
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12-Jan-2022 |
Simon Glass <sjg@chromium.org> |
fdt: Drop SPL_BUILD macro This old macro is not needed anymore since we can use IS_ENABLED() now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
39605c6e |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Record where the devicetree came from Keep track of where the devicetree came from, so we can report this later. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
98550343 |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Don't call board_fdt_blob_setup() without OF_BOARD At present this override function is called even when OF_BOARD is not enabled. This makes it impossible to disable this feature and in fact makes the OF_BOARD option useless. Reinstate its intended purpose, so that it is possible to switch between the appended devicetree and one provided by the board's custom function. A follower patch adds warnings for this scenario, but for now we don't have a Kconfig that definitively tells us that OF_BOARD should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d893b8ad |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Drop CONFIG_SPL_BUILD check in fdtdec_setup() Move this to the header file to clean up the C code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d6f8ab30 |
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11-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
treewide: Remove OF_PRIOR_STAGE The previous patches removed OF_PRIOR_STAGE from the last consumers of the Kconfig option. Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
b9aad375 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support reserved-memory flags Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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90194876 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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46cb0678 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support compatible string list for reserved memory Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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4bf88ba7 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support retrieving the name of a carveout When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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7de8bd03 |
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07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
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5e19f4aa |
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18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
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aa351a14 |
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12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marex@denx.de> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
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194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
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ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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118f4d45 |
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04-Mar-2019 |
Marek Vasut <marex@denx.de> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marex@denx.de> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
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91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
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19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
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920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
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69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
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f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
|
25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
|
25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
|
04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
|
26-Feb-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
|
19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
|
31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
|
01-Dec-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
|
01-Dec-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
|
21-Nov-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
|
25-Nov-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
|
23-Oct-2014 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
|
04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
|
05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
|
05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
|
20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
|
25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
|
14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
|
24-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
|
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
7e44d932 |
|
21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
|
24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
|
22-Jun-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
45a4d4d3 |
|
27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
|
12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
|
15-Apr-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
|
12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
|
04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
009d75cc |
|
28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
|
#
1e4706a7 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
|
26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
|
#
412665b4 |
|
26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
|
04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
|
20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
|
24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
|
10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
|
25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
|
12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
|
21-Sep-2012 |
Tom Rini <trini@konsulko.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
|
17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
545026a5 |
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16-Feb-2022 |
Tom Rini <trini@konsulko.com> |
fdtdec.h: Remove gurads around fdtdec_resetup function This function has not been conditionally compiled for some time, so remove the incorrect guards around the declaration. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
9876ae7d |
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04-Jan-2022 |
Patrice Chotard <patrice.chotard@foss.st.com> |
dm: Fix OF_BAD_ADDR definition When OF_LIVE flag is enabled on a 64 bits platform, there is an issue when dev_read_addr() is called and need to perform an address translation using __of_translate_address(). In case of error, __of_translate_address() return's value is OF_BAD_ADDR (wich is defined in include/dm/of.h to ((u64)-1) = 0xffffffffffffffff). The return value of dev_read_addr() is often compared to FDT_ADDR_T_NONE which is defined as (-1U) = 0xffffffff. In this case the comparison is always false. To fix this issue, define FDT_ADDR_T_NONE to (ulong)(-1) in case of AARCH64. Update accordingly related tests. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
185f812c |
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19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
f350f677 |
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12-Jan-2022 |
Simon Glass <sjg@chromium.org> |
fdt: Drop SPL_BUILD macro This old macro is not needed anymore since we can use IS_ENABLED() now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
39605c6e |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Record where the devicetree came from Keep track of where the devicetree came from, so we can report this later. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
98550343 |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Don't call board_fdt_blob_setup() without OF_BOARD At present this override function is called even when OF_BOARD is not enabled. This makes it impossible to disable this feature and in fact makes the OF_BOARD option useless. Reinstate its intended purpose, so that it is possible to switch between the appended devicetree and one provided by the board's custom function. A follower patch adds warnings for this scenario, but for now we don't have a Kconfig that definitively tells us that OF_BOARD should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d893b8ad |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Drop CONFIG_SPL_BUILD check in fdtdec_setup() Move this to the header file to clean up the C code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d6f8ab30 |
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11-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
treewide: Remove OF_PRIOR_STAGE The previous patches removed OF_PRIOR_STAGE from the last consumers of the Kconfig option. Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
b9aad375 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support reserved-memory flags Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
90194876 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
46cb0678 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support compatible string list for reserved memory Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
4bf88ba7 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support retrieving the name of a carveout When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
7de8bd03 |
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07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e19f4aa |
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18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
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12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
|
05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
|
06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
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11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
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#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
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#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
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20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
|
12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
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08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
|
24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
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14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
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07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
|
10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
|
09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
|
#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
|
25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
|
25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
|
12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
|
21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
|
28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
|
17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
|
24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9876ae7d |
|
04-Jan-2022 |
Patrice Chotard <patrice.chotard@foss.st.com> |
dm: Fix OF_BAD_ADDR definition When OF_LIVE flag is enabled on a 64 bits platform, there is an issue when dev_read_addr() is called and need to perform an address translation using __of_translate_address(). In case of error, __of_translate_address() return's value is OF_BAD_ADDR (wich is defined in include/dm/of.h to ((u64)-1) = 0xffffffffffffffff). The return value of dev_read_addr() is often compared to FDT_ADDR_T_NONE which is defined as (-1U) = 0xffffffff. In this case the comparison is always false. To fix this issue, define FDT_ADDR_T_NONE to (ulong)(-1) in case of AARCH64. Update accordingly related tests. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
f350f677 |
|
12-Jan-2022 |
Simon Glass <sjg@chromium.org> |
fdt: Drop SPL_BUILD macro This old macro is not needed anymore since we can use IS_ENABLED() now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
39605c6e |
|
16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Record where the devicetree came from Keep track of where the devicetree came from, so we can report this later. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
98550343 |
|
16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Don't call board_fdt_blob_setup() without OF_BOARD At present this override function is called even when OF_BOARD is not enabled. This makes it impossible to disable this feature and in fact makes the OF_BOARD option useless. Reinstate its intended purpose, so that it is possible to switch between the appended devicetree and one provided by the board's custom function. A follower patch adds warnings for this scenario, but for now we don't have a Kconfig that definitively tells us that OF_BOARD should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d893b8ad |
|
16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Drop CONFIG_SPL_BUILD check in fdtdec_setup() Move this to the header file to clean up the C code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e7fb7896 |
|
26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d6f8ab30 |
|
11-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
treewide: Remove OF_PRIOR_STAGE The previous patches removed OF_PRIOR_STAGE from the last consumers of the Kconfig option. Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
b9aad375 |
|
03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support reserved-memory flags Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
90194876 |
|
03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
46cb0678 |
|
03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support compatible string list for reserved memory Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
4bf88ba7 |
|
03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support retrieving the name of a carveout When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
7de8bd03 |
|
07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e19f4aa |
|
18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
|
12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
|
10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
|
19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
|
09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
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194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
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ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
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91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
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12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
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90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
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19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
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81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
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eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
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c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
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43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
|
13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
|
05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
|
15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
|
08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
|
12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
|
04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
|
16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
|
11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
|
30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
|
31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
|
19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
|
18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
|
14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
|
11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
|
29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
|
05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
|
19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
|
18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
|
05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
|
17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
|
17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
|
06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
|
22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
|
25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
|
04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
|
23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
|
04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
|
14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
|
21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
|
24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
|
27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
|
12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
|
04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
009d75cc |
|
28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
|
#
1e4706a7 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
|
26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
|
04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
|
24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
|
10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
|
09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
|
28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
|
17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
|
24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
185f812c |
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19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
f350f677 |
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12-Jan-2022 |
Simon Glass <sjg@chromium.org> |
fdt: Drop SPL_BUILD macro This old macro is not needed anymore since we can use IS_ENABLED() now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
39605c6e |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Record where the devicetree came from Keep track of where the devicetree came from, so we can report this later. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
98550343 |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Don't call board_fdt_blob_setup() without OF_BOARD At present this override function is called even when OF_BOARD is not enabled. This makes it impossible to disable this feature and in fact makes the OF_BOARD option useless. Reinstate its intended purpose, so that it is possible to switch between the appended devicetree and one provided by the board's custom function. A follower patch adds warnings for this scenario, but for now we don't have a Kconfig that definitively tells us that OF_BOARD should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d893b8ad |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Drop CONFIG_SPL_BUILD check in fdtdec_setup() Move this to the header file to clean up the C code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d6f8ab30 |
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11-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
treewide: Remove OF_PRIOR_STAGE The previous patches removed OF_PRIOR_STAGE from the last consumers of the Kconfig option. Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
b9aad375 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support reserved-memory flags Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
90194876 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
46cb0678 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support compatible string list for reserved memory Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
4bf88ba7 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support retrieving the name of a carveout When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
7de8bd03 |
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07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e19f4aa |
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18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
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12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
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19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
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eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
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43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
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623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
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4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
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920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
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da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
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6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
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69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
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f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
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e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
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f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
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3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
|
03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
|
25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
|
23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
|
13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
|
04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
|
05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
|
05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
|
20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
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08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
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14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
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07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
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17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
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17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
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11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
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29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
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31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
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03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f350f677 |
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12-Jan-2022 |
Simon Glass <sjg@chromium.org> |
fdt: Drop SPL_BUILD macro This old macro is not needed anymore since we can use IS_ENABLED() now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
39605c6e |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Record where the devicetree came from Keep track of where the devicetree came from, so we can report this later. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
98550343 |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Don't call board_fdt_blob_setup() without OF_BOARD At present this override function is called even when OF_BOARD is not enabled. This makes it impossible to disable this feature and in fact makes the OF_BOARD option useless. Reinstate its intended purpose, so that it is possible to switch between the appended devicetree and one provided by the board's custom function. A follower patch adds warnings for this scenario, but for now we don't have a Kconfig that definitively tells us that OF_BOARD should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d893b8ad |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Drop CONFIG_SPL_BUILD check in fdtdec_setup() Move this to the header file to clean up the C code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d6f8ab30 |
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11-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
treewide: Remove OF_PRIOR_STAGE The previous patches removed OF_PRIOR_STAGE from the last consumers of the Kconfig option. Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
b9aad375 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support reserved-memory flags Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
90194876 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
46cb0678 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support compatible string list for reserved memory Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
4bf88ba7 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support retrieving the name of a carveout When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
7de8bd03 |
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07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e19f4aa |
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18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
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12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
|
21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
|
19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
|
18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
|
05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
|
17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
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11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
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a9f04d49 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
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dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
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9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
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8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
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#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
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20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
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15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
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#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
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ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
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17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
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d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
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ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
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08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
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14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
|
10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
|
09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
|
#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
|
25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
|
21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
|
28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
|
17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
|
24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
39605c6e |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Record where the devicetree came from Keep track of where the devicetree came from, so we can report this later. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
98550343 |
|
16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Don't call board_fdt_blob_setup() without OF_BOARD At present this override function is called even when OF_BOARD is not enabled. This makes it impossible to disable this feature and in fact makes the OF_BOARD option useless. Reinstate its intended purpose, so that it is possible to switch between the appended devicetree and one provided by the board's custom function. A follower patch adds warnings for this scenario, but for now we don't have a Kconfig that definitively tells us that OF_BOARD should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d893b8ad |
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16-Dec-2021 |
Simon Glass <sjg@chromium.org> |
fdt: Drop CONFIG_SPL_BUILD check in fdtdec_setup() Move this to the header file to clean up the C code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d6f8ab30 |
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11-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
treewide: Remove OF_PRIOR_STAGE The previous patches removed OF_PRIOR_STAGE from the last consumers of the Kconfig option. Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
b9aad375 |
|
03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support reserved-memory flags Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
90194876 |
|
03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
46cb0678 |
|
03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support compatible string list for reserved memory Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
4bf88ba7 |
|
03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support retrieving the name of a carveout When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
7de8bd03 |
|
07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e19f4aa |
|
18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
|
12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
|
10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
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194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
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ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
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91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
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19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
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eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
|
13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
|
05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
|
15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
|
08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
|
12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
|
04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
|
16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
|
11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
|
30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
|
31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
|
19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
|
18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
|
14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
|
11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
|
29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
|
05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
|
19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
|
18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
|
05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
|
17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
|
17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
|
06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
|
22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
|
25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
|
04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
|
23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
|
04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
|
14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
|
21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
|
24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
|
27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
|
12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
|
04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
009d75cc |
|
28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
|
#
1e4706a7 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
|
26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
|
04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
|
24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
|
10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
|
09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
|
28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
|
17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d6f8ab30 |
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11-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
treewide: Remove OF_PRIOR_STAGE The previous patches removed OF_PRIOR_STAGE from the last consumers of the Kconfig option. Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
b9aad375 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support reserved-memory flags Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
90194876 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
46cb0678 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support compatible string list for reserved memory Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
4bf88ba7 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support retrieving the name of a carveout When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
7de8bd03 |
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07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
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5e19f4aa |
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18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
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12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
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920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
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69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
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f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
|
25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
|
25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
|
04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
|
26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
|
19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
|
31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
|
21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
|
25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
|
23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
|
13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
|
04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
|
05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
|
05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
|
20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
|
25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
|
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
7e44d932 |
|
21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
|
24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
45a4d4d3 |
|
27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
|
12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
|
#
1e4706a7 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
|
26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
|
26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
|
04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
|
20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
|
24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
|
09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
|
21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
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03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d6f8ab30 |
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11-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
treewide: Remove OF_PRIOR_STAGE The previous patches removed OF_PRIOR_STAGE from the last consumers of the Kconfig option. Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
b9aad375 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support reserved-memory flags Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
90194876 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
46cb0678 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support compatible string list for reserved memory Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
4bf88ba7 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support retrieving the name of a carveout When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
7de8bd03 |
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07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
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5e19f4aa |
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18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
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12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
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eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
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4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
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920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
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69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
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f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
|
22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
|
05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
|
20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
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15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
|
21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
|
24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
45a4d4d3 |
|
27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
|
12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
|
12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
|
04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
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08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
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14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
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07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
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11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
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29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
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31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
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17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
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03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b9aad375 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support reserved-memory flags Reserved memory nodes can have additional flags. Support reading and writing these flags to ensure that reserved memory nodes can be properly parsed and emitted. This converts support for the existing "no-map" flag to avoid extending the argument list for fdtdec_add_reserved_memory() to excessive length. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
90194876 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Reorder fdtdec_set_carveout() parameters for consistency The fdtdec_set_carveout() function's parameters are inconsistent with the parameters passed to fdtdec_add_reserved_memory(). Fix up the order to make it more consistent. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
46cb0678 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support compatible string list for reserved memory Reserved memory nodes can have a compatible string list to identify the type of reserved memory that they represent. Support specifying an optional compatible string list when creating these nodes. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
4bf88ba7 |
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03-Sep-2021 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Support retrieving the name of a carveout When retrieving a given carveout for a device, allow callers to query the name. This helps differentiating between carveouts when there are more than one. This is also useful when copying carveouts to help assign a meaningful name that cannot always be guessed. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
7de8bd03 |
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07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e19f4aa |
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18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
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12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
|
05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
|
19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
|
18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
|
05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
|
17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
|
06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
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a9f04d49 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
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dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
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9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
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8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
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#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
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20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
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15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
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#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
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ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
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17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
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d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
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ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
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08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
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14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
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07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
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17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
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17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
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11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
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29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
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31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7de8bd03 |
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07-Aug-2021 |
Simon Glass <sjg@chromium.org> |
treewide: fdt: Move fdt_get_config_... to ofnode_conf_read... The current API is outdated as it requires a devicetree pointer. Move these functions to use the ofnode API and update this globally. Add some tests while we are here. Correct the call in exynos_dsim_config_parse_dt() which is obviously wrong. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e19f4aa |
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18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
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12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@gmail.com> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
|
04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
|
30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
|
31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
|
18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
|
11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
|
29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
|
05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
|
19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
|
18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
|
05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
|
17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
|
17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
|
06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
|
22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
|
04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
|
26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
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f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
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1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
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#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
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bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
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3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
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65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
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77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
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a9f04d49 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
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26403871 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
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f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
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76489832 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
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dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
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9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
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8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
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#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
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20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
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15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
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#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
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ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
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fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
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17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
|
04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
|
20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
|
24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
|
10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
|
09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
|
#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
|
25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
|
25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
|
12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
|
21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
|
28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
|
17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
|
24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e19f4aa |
|
18-Jul-2021 |
Simon Glass <sjg@chromium.org> |
samsung: exynos: Convert SROMC interface to a driver Add a bus driver for this and use it to configure the bus parameters for the Ethernet interface. Drop the old pre-driver-model code. Switch over to use driver model for Ethernet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
aa351a14 |
|
12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
|
10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
|
19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
|
09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
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194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
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ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
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91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
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12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
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90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
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19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
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81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
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eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
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c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
|
13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
|
05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
|
15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
|
08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
|
12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
|
04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
|
16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
|
11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
|
30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
|
31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
|
19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
|
18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
|
14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
|
11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
|
29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
|
05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
|
19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
|
18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
|
05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
|
17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
|
17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
|
06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
|
22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
|
25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
|
04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
|
23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
|
04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
|
14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
|
21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
|
24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
|
27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
|
12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
|
04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
009d75cc |
|
28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
|
#
1e4706a7 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
|
26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
|
04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
|
24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
|
10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
|
09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
|
28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
|
17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aa351a14 |
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12-Apr-2021 |
Chen Guanqiao <chenguanqiao@kuaishou.com> |
dm: core: Add size operations on device tree references Add functions to add size of addresses in the device tree using ofnode references. If the size is not set, return FDT_SIZE_T_NONE. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
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19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
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eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b7e0d73b |
|
18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
|
05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
|
13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
|
17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
|
06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
|
04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
|
23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
|
04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
|
05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
|
14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
|
24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
|
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
7e44d932 |
|
21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
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08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
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17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
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17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
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11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
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29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
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31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
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17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
|
28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
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ccaa5747 |
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10-Sep-2020 |
Etienne Carriere <etienne.carriere@st.com> |
fdtdec: optionally add property no-map to created reserved memory node Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
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194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
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ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
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91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
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12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
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90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
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19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
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81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
|
29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
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11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
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17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
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1db7ee46 |
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19-Oct-2019 |
Suneel Garapati <sgarapati@marvell.com> |
fdtdec: Add API to read pci bus-range property Add fdtdec_get_pci_bus_range to read bus-range property values. Signed-off-by: Suneel Garapati <sgarapati@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
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194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
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ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
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91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
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19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
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69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
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f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
|
25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
|
25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
|
04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
|
26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
|
19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
|
31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
|
21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
|
25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
|
23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
|
13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
|
04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
|
05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
|
05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
|
20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
|
25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
|
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
7e44d932 |
|
21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
|
24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
45a4d4d3 |
|
27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
|
12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
|
#
1e4706a7 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
|
26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
|
26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
|
04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
|
20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
|
24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
|
09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
|
21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
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03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7fce7396 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
lib: fdt: Introduce fdtdec_setup_mem_size_base_lowest() New function should be called from board dram_init() because it initialized gd->ram_base/ram_size. It finds the lowest available memory. On systems with multiple memory nodes finding out the first memory node by fdtdec_setup_mem_size_base() is not enough because this memory can be above actual U-Boot VA mapping. Currently only mapping till 39bit is supported (Full 44bit mapping was removed by commit 7985cdf74b28 ("arm64: Remove non-full-va map code")). If DT starts with the first memory node above 39bit address then system can be unpredictable. The function is available only when multiple memory bank support is enabled. Calling fdtdec_setup_memory_banksize() from dram_init() is not possible because fdtdec_setup_memory_banksize() is saving dram information to bd structure which is placed on stack but not initialized at this time. Also stack is placed at location setup in dram_init(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
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eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
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c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
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f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
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2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
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43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
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623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
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6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
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4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
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920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
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da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
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6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
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69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
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f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
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e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
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f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
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3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
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129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
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b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
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dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
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6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
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28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
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11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
|
05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
|
05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
|
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
45a4d4d3 |
|
27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
|
#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
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17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
|
12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
|
21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
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03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
50c7b723 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
62897c43 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
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43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
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623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
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6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
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4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
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920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
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da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
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6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
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69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
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f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
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e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
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f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
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3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
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dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
|
03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
|
25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
|
04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
|
05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
|
05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
|
20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
|
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
45a4d4d3 |
|
27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
009d75cc |
|
28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
|
#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
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07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
|
21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
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03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b589b809 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_mem_size_base()" This reverts commit 3ebe09d09a407f93022d945a205c5318239eb3f6. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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d4cc6f63 |
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10-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
Revert "lib: fdt: Split fdtdec_setup_memory_banksize()" This reverts commit 118f4d4559a4386fa87a1e2509e84a1986b24a34. There is no user of this split function that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
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eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
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c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
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f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
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2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
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43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
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623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
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6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
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4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
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920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
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da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
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6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
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69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
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f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
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e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
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f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
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3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
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129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
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b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
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dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
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6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
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28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
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11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
|
01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
|
05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
|
05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
|
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
45a4d4d3 |
|
27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
|
#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
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17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
|
12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
|
21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
|
#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
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03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0e2afc83 |
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11-Apr-2020 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
fdtdec: Add weak function to patch U-Boot DT right after fdtdec_setup() Add weak function which is called right after fdtdec_setup() configured the U-Boot DT. This permits board-specific adjustments to the U-Boot DT before U-Boot starts parsing the DT. This could be used e.g. to patch in various custom nodes or merge in DT fragments from prior-stage firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
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38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
|
29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
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11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
|
12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
|
24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
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17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
194fca91 |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: pci: Update a few more interfaces for const udevice * Tidy up a few places where const * should be used. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
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6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
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69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
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f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
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11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
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20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
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15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
|
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
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08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
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17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
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17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
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11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
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29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
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31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
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17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
|
28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2ebebb94 |
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28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move embedded fdt location to fdtdec.h These declarations are only used in fdtdec.c so move them to its header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
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12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
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19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
|
13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
|
05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
|
15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
|
19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
|
08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
|
12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
|
04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
|
16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
|
11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
|
30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
|
31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
|
19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
|
18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
|
14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
|
11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
|
29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
|
05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
|
19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
|
18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
|
05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
|
17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
|
17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
|
06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
|
22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
|
07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
|
03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
|
04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
|
25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
|
25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
|
14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
|
25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
|
27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
|
04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
|
09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
|
14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
|
24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
|
23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
|
23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
|
10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
|
26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
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20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
|
15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
|
27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
|
07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
|
21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
|
24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
#
f6267998 |
|
12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
|
04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
|
#
009d75cc |
|
28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
|
#
1e4706a7 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
|
21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
|
26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
|
04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
|
24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
|
10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
|
09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
|
28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
|
17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
|
24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
357d2ceb |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: only create phandle if caller wants it in fdtdec_add_reserved_memory() The phandlep pointer returning the phandle to the caller is optional and if it is not set when calling fdtdec_add_reserved_memory() it is highly likely that the caller is not interested in a phandle to the created reserved-memory area and really just wants that area added. So just don't create a phandle in that case. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
086336a2 |
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23-Oct-2019 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
fdtdec: protect against another NULL phandlep in fdtdec_add_reserved_memory() The change adding fdtdec_add_reserved_memory() already protected the added phandle against the phandlep being NULL - making the phandlep var optional. But in the early code checking for an already existing carveout this check was not done and thus the phandle assignment could run into trouble, so add a check there as well, which makes the function still return successfully if a matching region is found, even though no-one wants to work with the phandle. Fixes: c9222a08b3f7 ("fdtdec: Implement fdtdec_add_reserved_memory()") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
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21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
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15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
|
04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
|
30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
|
31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
|
18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
|
11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
|
29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
|
05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
|
19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
|
18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
|
05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
|
17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
|
17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
|
06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
|
25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
|
22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
|
03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
|
06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
|
05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
|
04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
|
11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
|
26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
|
05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
|
25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
|
05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
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f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
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1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
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#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
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bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
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3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
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65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
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77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
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a9f04d49 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
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26403871 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
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f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
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76489832 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
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dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
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9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
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8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
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#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
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20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
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15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
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#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
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ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
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fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
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17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
|
16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
|
04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
|
20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
|
08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
|
24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
|
14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
|
29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
|
08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
|
07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
|
10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
|
09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
|
#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
|
25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
|
25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
|
12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
|
21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
|
11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
|
31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
|
28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
|
17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
|
24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
594d272c |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
dm: core: Drop fdtdec_get_pci_addr() This function ise effectively replaced by ofnode_read_pci_addr() which works with flat tree. Delete it to avoid code duplication. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
c4f603f7 |
|
21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
|
15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
|
15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
|
15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
|
21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
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21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
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04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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f94fa0e9 |
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11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
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11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
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31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
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07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
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25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
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623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
#
69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
#
4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
|
18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d9eda6c4 |
|
05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
28824407 |
|
05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
|
#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
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11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
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#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
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#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
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20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
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15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
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#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
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08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
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14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
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07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
|
26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
|
09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
|
17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
|
25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
|
25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
|
25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
|
12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
|
25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
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11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
#
312693c3 |
|
29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
00a2749d |
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31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6642a681 |
|
17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
bed4d892 |
|
17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
0e35ad05 |
|
02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3ddecfc7 |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96875e7d |
|
02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
|
06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
c6782270 |
|
03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
9a263e55 |
|
28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
87f938c9 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
ed3ee5cd |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
d17da655 |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f88fe2de |
|
27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
a53f4a29 |
|
17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
b5220bc6 |
|
24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c4f603f7 |
|
21-Aug-2019 |
Lukas Auer <lukas.auer@aisec.fraunhofer.de> |
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being used in U-Boot SPL. Change the logic to also make it available in U-Boot SPL. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> |
#
ebf30e84 |
|
15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdtdec_set_ethernet_mac_address() This function can be used to set the local MAC address for the default Ethernet interface in its device tree node. The default interface is identified by the "ethernet" alias. One case where this is useful is for devices that store their MAC address in a custom location. Once extracted, board code can store the MAC address in U-Boot's control DTB so that it will automatically be used by the Ethernet uclass. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
3bf2f153 |
|
15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Remove fdt_{addr,size}_unpack() U-Boot already defines the {upper,lower}_32_bits() macros that have the same purpose. Use the existing macros instead of defining new APIs. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
d81d9690 |
|
15-Apr-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle() The fdt_setprop_u32() function does everything that we need, so we really only use the function as a convenience wrapper, in which case it can simply be a static inline function. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
16523ac7 |
|
21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement carveout support functions The fdtdec_get_carveout() and fdtdec_set_carveout() function can be used to read a carveout from a given node or add a carveout to a given node using the standard device tree bindings (involving reserved-memory nodes and the memory-region property). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
c9222a08 |
|
21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_add_reserved_memory() This function can be used to add subnodes in the /reserved-memory node. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
8153d53b |
|
21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Implement fdtdec_set_phandle() This function can be used to set a phandle for a given node. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
4f253ad0 |
|
21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add fdt_{addr, size}_unpack() helpers These helpers can be used to unpack variables of type fdt_addr_t and fdt_size_t into a pair of 32-bit variables. This is useful in cases where such variables need to be written to properties (such as "reg") of a device tree node where they need to be split into cells. Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
155d0a08 |
|
21-Mar-2019 |
Thierry Reding <treding@nvidia.com> |
fdtdec: Add cpu_to_fdt_{addr, size}() macros These macros are useful for converting the endianness of variables of type fdt_addr_t and fdt_size_t. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
118f4d45 |
|
04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_memory_banksize() Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
3ebe09d0 |
|
04-Mar-2019 |
Marek Vasut <marek.vasut@gmail.com> |
lib: fdt: Split fdtdec_setup_mem_size_base() Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(), which allows the caller to pass custom blob into the function and the original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This is useful when configuring the DRAM properties from a FDT blob fragment passed in by the firmware. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f94fa0e9 |
|
11-Feb-2019 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c - DM I2C improvements
|
#
91b3a186 |
|
11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: tegra: Drop COMPAT_AMS_AS3722 This is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
38b043d4 |
|
11-Jan-2019 |
Simon Glass <sjg@chromium.org> |
fdt: samsung: Drop unused fdt_compat_id values This enum still exists but we can shrink it a little based on recent driver-model conversions with samsung. Update it to remove unused items. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> |
#
003c9dc8 |
|
31-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
fdt: Introduce fdtdec_get_alias_highest_id() Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f1d2bc90 |
|
07-Dec-2018 |
Jean-Jacques Hiblot <jjhiblot@ti.com> |
lib: fdtdec: Add function re-setup the fdt more effeciently In some cases it may be useful to be able to change the fdt we have been using and use another one instead. For example, the TI platforms uses an EEPROM to store board information and, based on the type of board, different dtbs are used by the SPL. When DM_I2C is used, a first dtb must be used before the I2C is initialized and only then the final dtb can be selected. To speed up the process and reduce memory usage, introduce a new function fdtdec_setup_best_match() that re-use the DTBs loaded in memory by fdtdec_setup() to select the best match. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
b2364485 |
|
28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
25a3845d |
|
01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
12308b12 |
|
16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com> |
#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> |
#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> |
#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com> |
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eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> |
#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com> |
#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org> |
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82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de> |
#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> |
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920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> |
#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller |
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69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
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f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> |
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4edde961 |
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14-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
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#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
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fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com> |
#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> |
#
f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org> |
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d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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28824407 |
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05-Nov-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-socfpga
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#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de> |
#
3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> |
#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cc7aebe8 |
|
11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com> |
#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org> |
#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org> |
#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
6462cded |
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11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> |
#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com> |
#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error) |
#
f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
88342103 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
f4e7e2d1 |
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01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
1fc4e6f4 |
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25-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-fdt
|
#
effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9f04d49 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
26403871 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com> |
#
76489832 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> |
#
dee8abcd |
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23-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
#
ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
#
56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
8d028d40 |
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13-Sep-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-dm
|
#
aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9e8f664e |
|
05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
45c480c9 |
|
05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5c33c9fd |
|
23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a9cf6da9 |
|
20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7d3ca0f8 |
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15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ab6423ca |
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25-Mar-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
|
#
7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de> |
#
c2120fbf |
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24-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-i2c The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> |
#
88364387 |
|
15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> |
#
ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
348e47f7 |
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22-Jun-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> |
#
17059f97 |
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15-Apr-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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#
f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fed029f3 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
009d75cc |
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28-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' Conflicts: drivers/spi/tegra20_sflash.c include/fdtdec.h lib/fdtdec.c
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
ebd749da |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'
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#
412665b4 |
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26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> |
#
e32624ef |
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08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> |
#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
7772bb78 |
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14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
6abd1620 |
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07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
#
2c601c72 |
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09-Dec-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
Merge branch 'master' of git://git.denx.de/u-boot into resolve Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
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#
87540de3 |
|
17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
e1ae0d1f |
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17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5921f6a2 |
|
25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f20c4619 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
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9fe2cfb4 |
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21-Sep-2012 |
Tom Rini <trini@ti.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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#
5bfa78db |
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11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> |
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312693c3 |
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29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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00a2749d |
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31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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6642a681 |
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17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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3ddecfc7 |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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c6782270 |
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03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b2364485 |
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28-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
fdt: restore board_fdt_blob_setup() declaration Commit 90c08fa038451d (fdt: Add device tree memory bindings) removed the prototype declaration of board_fdt_blob_setup(), most likely by mistake. This didn't break the build because the only file calling this function (lib/fdtdec.c) provides a local weak definition. Restore the declaration. Cc: Michael Pratt <mpratt@chromium.org> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Simon Glass <sjg@chromium.org>
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#
25a3845d |
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01-Oct-2018 |
Simon Glass <sjg@chromium.org> |
fdt: Remove fdtdec_decode_region() function This function is not used in U-Boot now. Remove it along with its 'memory' version. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
12308b12 |
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16-Jul-2018 |
Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
lib: fdtdec: Rename routine fdtdec_setup_memory_size() This patch renames the routine fdtdec_setup_memory_size() to fdtdec_setup_mem_size_base() as it now fills the mem base as well along with size. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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#
894c3ad2 |
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08-Jun-2018 |
Thomas Fitzsimmons <fitzsim@fitzsim.org> |
board: arm: Add support for Broadcom BCM7445 Add support for loading U-Boot on the Broadcom 7445 SoC. This port assumes Broadcom's BOLT bootloader is acting as the second stage bootloader, and U-Boot is acting as the third stage bootloader, loaded as an ELF program by BOLT. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Florian Fainelli <f.fainelli@gmail.com>
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#
90c08fa0 |
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11-Jun-2018 |
Michael Pratt <mpratt@chromium.org> |
fdt: Add device tree memory bindings Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
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#
19c8fc77 |
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12-May-2018 |
Marek Vasut <marex@denx.de> |
fdt: Add another Altera Arria10 clock init compatible The DT bindings for the Arria10 clock init have changed, add another compatible to make them work with U-Boot until a proper clock driver gets written. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org>
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#
81766923 |
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25-Jan-2018 |
Jaehoon Chung <jh80.chung@samsung.com> |
lib: fdtdec: drop the old compatible about max77686 Drop the old compatible about max77686. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <lukma@denx.de>
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#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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#
c6b89f31 |
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12-Feb-2018 |
Mario Six <six@gdsys.cc> |
sandbox: Add 64-bit sandbox To debug device tree issues involving 32- and 64-bit platforms, it is useful to have a generic 64-bit platform available. Add a version of the sandbox that uses 64-bit integers for its physical addresses as well as a modified device tree. Signed-off-by: Mario Six <mario.six@gdsys.cc> Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig Signed-off-by: Simon Glass <sjg@chromium.org>
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#
3b595da4 |
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10-Jan-2018 |
Rob Clark <robdclark@gmail.com> |
fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by u-boot build. This allows the board to patch the fdt, etc. In the specific case of dragonboard 410c, we pass the u-boot generated fdt to the previous stage of bootloader (by embedding it in the u-boot.img that is loaded by lk/aboot), which patches the fdt and passes it back to u-boot. Signed-off-by: Rob Clark <robdclark@gmail.com> [trini: Update board_fdt_blob_setup #if check] Signed-off-by: Tom Rini <trini@konsulko.com>
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#
eb57c0be |
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25-Sep-2017 |
Tien Fong Chee <tien.fong.chee@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
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#
c20ee0ed |
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29-Aug-2017 |
Simon Glass <sjg@chromium.org> |
dtoc: Add support for 32 or 64-bit addresses When using 32-bit addresses dtoc works correctly. For 64-bit addresses it does not since it ignores the #address-cells and #size-cells properties. Update the tool to use fdt64_t as the element type for reg properties when either the address or size is larger than one cell. Use the correct value so that C code can obtain the information from the device tree easily. Alos create a new type, fdt_val_t, which is defined to either fdt32_t or fdt64_t depending on the word size of the machine. This type corresponds to fdt_addr_t and fdt_size_t. Unfortunately we cannot just use those types since they are defined to phys_addr_t and phys_size_t which use 'unsigned long' in the 32-bit case, rather than 'unsigned int'. Add tests for the four combinations of address and size values (32/32, 64/64, 32/64, 64/32). Also update existing uses for rk3399 and rk3368 which now need to use the new fdt_val_t type. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Heiko Stuebner <heiko@sntech.de> Reported-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Kever Yang <kever.yang@rock-chips.com>
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#
f6a4093b |
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25-Jul-2017 |
Simon Glass <sjg@chromium.org> |
fdtdec: Drop old compatible values These are not needed now since the drivers now use driver model. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Tested-by: Stephen Warren <swarren@nvidia.com>
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#
2ec9d171 |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
cros_ec: Convert to support live tree Convert this driver to support the live device tree and remove the old fdtdec support. The keyboard is not yet converted. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
b7e0d73b |
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18-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: core: Add a place to put extra device-tree reading functions Some functions deal with structured data rather than simple data types. It makes sense to have these in their own file. For now this just has a function to read a flashmap entry. Move the data types also. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
43c6bdd0 |
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29-Apr-2017 |
Jernej Skrabec <jernej.skrabec@siol.net> |
edid: Add HDMI flag to timing info Some DVI monitors don't show anything in HDMI mode since audio stream confuses them. To solve this situation, this commit adds HDMI flag in timing data and sets it accordingly during edid parsing. First existence of extension block is checked. If it exists and it is CEA861 extension, then data blocks are checked for presence of HDMI vendor specific data block. If it is present, HDMI flag is set. Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org>
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#
82f766d1 |
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02-Apr-2017 |
Alex Deymo <deymo@google.com> |
Allow boards to initialize the DT at runtime. In some boards like the Raspberry Pi the initial bootloader will pass a DT to the kernel. When using U-Boot as such kernel, the board code in U-Boot should be able to provide U-Boot with this, already assembled device tree blob. This patch introduces a new config option CONFIG_OF_BOARD to use instead of CONFIG_OF_EMBED or CONFIG_OF_SEPARATE which will initialize the DT from a board-specific funtion instead of bundling one with U-Boot or as a separated file. This allows boards like the Raspberry Pi to reuse the device tree passed from the bootcode.bin and start.elf firmware files, including the run-time selected device tree overlays. Signed-off-by: Alex Deymo <deymo@google.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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#
e11b5e8d |
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05-Apr-2017 |
Ley Foon Tan <ley.foon.tan@intel.com> |
fdt: Add compatible strings for Arria 10 Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
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#
623f6019 |
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18-Dec-2016 |
Nathan Rossi <nathan@nathanrossi.com> |
fdt: add memory bank decoding functions for board setup Add two functions for use by board implementations to decode the memory banks of the /memory node so as to populate the global data with ram_size and board info for memory banks. The fdtdec_setup_memory_size() function decodes the first memory bank and sets up the gd->ram_size with the size of the memory bank. This function should be called from the boards dram_init(). The fdtdec_setup_memory_banksize() function decode the memory banks (up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size into the gd->bd->bi_dram array of banks. This function should be called from the boards dram_init_banksize(). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <monstr@monstr.eu> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
47a79f65 |
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13-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
usb: uniphier: remove UniPhier xHCI driver and select DM_USB This driver has not been converted to Driver Model, and it is an obstacle to migrate other block device drivers. Remove it for now. The UniPhier SoCs already use a DM-based EHCI driver, so now ARCH_UNIPHIER can select DM_USB. These two changes must be done atomically because removing the legacy driver causes a build error. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marex@denx.de>
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#
6e06acb7 |
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05-Aug-2016 |
Stephen Warren <swarren@nvidia.com> |
fdt: allow fdtdec_get_addr_size_*() to translate addresses Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org>
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#
4ccae81c |
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15-Jun-2016 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
mtd: nand: Add the sunxi NAND controller driver We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
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#
920c6965 |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
sandbox: Find keyboard driver using driver model The cros-ec keyboard is always a child of the cros-ec node. Rather than searching the device tree, looking at the children. Remove the compat string which is now unused. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
da9e0a9b |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop unused exynos compatible strings A few drivers have moved to driver model, so we can drop these strings. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
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#
6cd2602d |
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19-Jun-2016 |
Simon Glass <sjg@chromium.org> |
x86: fdt: Drop the unused compatible strings in fdtdec We have drivers for several more devices now, so drop the strings which are no-longer used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
703aaf76 |
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08-May-2016 |
Simon Glass <sjg@chromium.org> |
fdt: Drop some unused compatible strings We have driver-model drivers for some of these now, so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
39f63332 |
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12-May-2016 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: add basic Tegra186 support Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
1cc0a9f4 |
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04-May-2016 |
Robert P. J. Day <rpjday@crashcourse.ca> |
Fix various typos, scattered over the code. Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller
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#
69ca6fd8 |
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16-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: dts: Drop memory SPD compatible string This is not needed now that the memory controller driver has the SPD data in its own node. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
779653b0 |
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11-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
d7659212 |
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30-Jan-2016 |
Simon Glass <sjg@chromium.org> |
tegra: nyan-big: Move the LCD driver to driver model Adjust the driver to use driver model. The SOR becomes a bridge device. We use the normal simple_panel driver to handle the display itself. We also need to enable some options such as regulators, PWMs and DM_VIDEO itself. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
1889a7e2 |
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31-Jan-2016 |
Peng Fan <van.freenix@gmail.com> |
fdt: introduce fdtdec_get_child_count Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
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#
f8b4e45e |
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19-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop the irq router compatible string We use driver model for this now, so we don't need this string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
3ade5bc4 |
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18-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: video: sandbox: Convert sandbox to use driver model for video Now that driver model support is available, convert sandbox over to use it. We can remove a few of the special hooks that sandbox currently has. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
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#
394e0b66 |
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11-Dec-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible string for Intel IvyBridge FSP Use "intel,ivybridge-fsp" for Intel IvyBridge FSP compatible string. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
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#
fcc0a877 |
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29-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: serial: Convert ns16550 driver to use driver model PCI API Use the driver model version of the function to find the BAR. This updates the fdtdec function, of which ns16550 is the only user. The fdtdec_get_pci_bdf() function is dropped for several reasons: - with driver model we should use 'struct udevice *' rather than passing the device tree offset explicitly - there are no other users in the tree - the function parses for information which is already available in the PCI device structure (specifically struct pci_child_platdata which is available at dev_get_parent_platdata(dev) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
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#
ef4b01b2 |
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05-Dec-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: Allow DWC2 UDC probing from OF The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
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#
e81ca884 |
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19-Nov-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: pci: Convert tegra boards to driver model for PCI Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
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#
f77f5e9b |
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18-Oct-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Convert keyboard driver to driver model Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
d9eda6c4 |
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05-Oct-2015 |
Stephen Warren <swarren@nvidia.com> |
pci: tegra: add/enable support for Tegra210 This needs a separate compatible value from Tegra124 since the new HW version has bugs that would prevent a driver for previous HW versions from operating at all. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
bfa3e55b |
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17-Oct-2015 |
Chin Liang See <clsee@altera.com> |
lib, fdt: Adding fdtdec_get_uint function Adding fdtdec_get_uint function which is the unsigned version for fdtdec_get_int Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vikas Manocha <vikas.manocha@st.com> Cc: Jagannadh Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Heiko Schocher <hs@denx.de>
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#
3bc37a50 |
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17-Oct-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to look up a /chosen property It is sometimes useful to find a property in the chosen node. Add a function for this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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#
02464e38 |
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06-Aug-2015 |
Stephen Warren <swarren@nvidia.com> |
fdt: add new fdt address parsing functions fdtdec_get_addr_size() hard-codes the number of cells used to represent an address or size in DT. This is incorrect in many cases depending on the DT binding for a particular node or property (e.g. it is incorrect for the "reg" property). In most cases, DT parsing code must use the properties #address-cells and #size-cells to parse addres properties. This change splits up the implementation of fdtdec_get_addr_size() so that the core logic can be used for both hard-coded and non-hard-coded cases. Various wrapper functions are implemented that support cases where hard-coded cell counts should or should not be used, and where the client does and doesn't know the parent node ID that contains the properties #address-cells and #size-cells. dev_get_addr() is updated to use the new functions. Core functionality in fdtdec_get_addr_size_fixed() is widely tested via fdtdec_get_addr_size(). I tested fdtdec_get_addr_size_auto_noparent() and dev_get_addr() by manually modifying the Tegra I2C driver to invoke them. Much of the core implementation of fdtdec_get_addr_size_fixed(), fdtdec_get_addr_size_auto_parent(), and fdtdec_get_addr_size_auto_noparent() comes from Thierry Reding's previous commit "fdt: Fix fdtdec_get_addr_size() for 64-bit". Based-on-work-by: Thierry Reding <treding@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped #define DEBUG at the top of fdtdec.c: Signed-off-by: Simon Glass <sjg@chromium.org>
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#
129adf5b |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
mmc: dw_mmc: Probe the MMC from OF Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
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#
b697e0ff |
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22-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dm: tpm: Convert I2C driver to driver model Convert the tpm_tis_i2c driver to use driver model and update boards which use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Christophe Ricard<christophe-h.ricard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
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#
0f925822 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: clean up OF_CONTROL ifdef conditionals We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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#
dffb86e4 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROL As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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#
cc7aebe8 |
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11-Aug-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
fdtdec: fix OF_CONTROL switch There is no case where defined(SPL_DISABLE_OF_CONTROL) is true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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#
f3b84a30 |
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07-Aug-2015 |
Andrew Bradford <andrew.bradford@kodakalaris.com> |
x86: baytrail: Configure FSP UPD from device tree Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by: Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by: Simon Glass <sjg@chromium.org>
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#
6ab00db2 |
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25-Jul-2015 |
Marek Vasut <marex@denx.de> |
arm: socfpga: misc: Reset ethernet from OF Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc hardcoded values in the U-Boot code. Since we don't have a proper reset framework in place yet, we have to do this slightly ad-hoc parsing of the OF tree instead. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
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#
28445aa7 |
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03-Aug-2015 |
York Sun <yorksun@freescale.com> |
lib/fdtdec: Fix fdt_addr_t and fdt_size_t typedef fdt_addr_t is a physical address. It can be either 64-bit or 32-bit, depending on the architecture. It should be phys_addr_t instead of u64 or u32. Similarly, fdt_size_t is changed to phys_size_t. Signed-off-by: York Sun <yorksun@freescale.com> CC: Simon Glass <sjg@chromium.org>
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#
5ae3a5e8 |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
dts: Drop unused compatible ID for the NXP video bridge This has moved to driver model so we can drop the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
68964dbc |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
video: Remove the old parade driver We have a new one which uses driver model and device tree configuration. Remove the old one. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
05bccbcd |
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03-Aug-2015 |
Simon Glass <sjg@chromium.org> |
power: Remove old TPS65090 drivers Remove the old drivers (both the normal one and the cros_ec one) now that we have new drivers that use driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
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7aaa5a60 |
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04-Mar-2015 |
Tom Warren <twarren@nvidia.com> |
ARM: Tegra210: Add support to common Tegra source/config files Derived from Tegra124, modified as appropriate during T210 board bringup. Cleaned up debug statements to conserve string space, too. This also adds misc 64-bit changes from Thierry Reding/Stephen Warren. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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#
257bfd2e |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: tegra: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
af282245 |
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06-Mar-2015 |
Simon Glass <sjg@chromium.org> |
sandbox: Move CONFIG_SANDBOX_SERIAL to Kconfig Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
5318f18d |
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25-May-2015 |
Gabriel Huau <contact@huau-gabriel.fr> |
x86: gpio: add pinctrl support from the device tree Every pin can be configured now from the device tree. A dt-bindings has been added to describe the different property available. Change-Id: I1668886062655f83700d0e7bbbe3ad09b19ee975 Signed-off-by: Gabriel Huau <contact@huau-gabriel.fr> Acked-by: Simon Glass <sjg@chromium.org>
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#
9c7dea60 |
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25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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#
00f37327 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra: video: Support serial output resource (SOR) on tegra124 The SOR is required for talking to eDP LCD panels. Add a driver for this which will be used by the DisplayPort driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
12e67114 |
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14-Apr-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Add binding decode function for display-timings This is useful for display parameters. Add a simple decode function to read from this device tree node. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
f56da290 |
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25-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: usb: exynos: Drop legacy USB code Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
b2b0d3e7 |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
dm: core: Select device tree control correctly for SPL Some boards will not use device tree for SPL even with driver model. Add the logic to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
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0879361f |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Rename setup_fdt() and make it prepare also There is little reason to split these two functions. Bring them together which simplifies the init sequence. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
b45122fd |
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27-Feb-2015 |
Simon Glass <sjg@chromium.org> |
fdt: sandbox: Move setup code from board_f to fdtdec We want to be able to set up the device tree in SPL, so move this code to a common place. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
3fbb7871 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
cros_ec: exynos: Match up device tree with kernel version The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
ce6adaa4 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Drop LPC compatible string in fdtdec This is not needed now that we have moved chromebook_link and cros_ec to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
672055e2 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: cros_ec: Drop compatible string in fdtdec This is not needed now that we have moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
90b16d14 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: dts: Add PCH and LPC devices The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
106cce96 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Tighten up error handling in fdtdec_get_pci_addr() This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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#
5f7bfdd6 |
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05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
fdt: Export fdtdec_get_number() for general use This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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#
0eb9dc76 |
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04-Mar-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Improve fdtdec_get_pci_bdf() documentation Add the description that how the compatible property is involved in the fdtdec_get_pci_bdf() documentation. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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#
6462cded |
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11-Mar-2015 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: UniPhier: adjust device trees for business transfer Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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#
1e7df7c4 |
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26-Feb-2015 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
usb: UniPhier: add UniPhier on-chip xHCI host driver support Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
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#
c89ada01 |
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05-Feb-2015 |
Bin Meng <bmeng.cn@gmail.com> |
fdtdec: Add compatible id and string for Intel Quark MRC Add COMPAT_INTEL_QRK_MRC and "intel,quark-mrc" so that fdtdec can decode Intel Quark MRC node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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#
b9749eb5 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Drop unused COMPAT features for SPI This has moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
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#
dedff1a0 |
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25-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: tegra: Drop unused COMPAT features for I2C, SPI These have moved to driver model so we don't need the fdtdec support. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
009067c3 |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Remove the old GPIO functions Now that we support device tree GPIO bindings directly in the driver model GPIO uclass we can remove these functions. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
57068a7a |
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05-Jan-2015 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to decode phandles with arguments For GPIOs and other functions we want to look up a phandle and then decode a list of arguments for that phandle. Each phandle can have a different number of arguments, specified by a property in the target node. This is the "#gpio-cells" property for GPIOs. Add a function to provide this feature, taken modified from Linux 3.18. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
5da38086 |
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19-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add compatible string for Intel ICH9 SPI controller Add this to the enum so that we can use the various fdtdec functions. A later commit will move this driver to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
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a62e84d7 |
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31-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Include <pci.h> in fdtdec.h and adjust tegra to fix build error)
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f315828b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
pci: tegra: Add Tegra PCIe driver Add support for the PCIe controller found on some generations of Tegra. Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root ports with a total of 6 lanes and Tegra124 has 2 root ports with a total of 5 lanes. This is based on the Linux kernel driver, originally submitted upstream by Mike Rapoport. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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79c7a90f |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement XUSB pad controller This controller was introduced on Tegra114 to handle XUSB pads. On Tegra124 it is also used for PCIe and SATA pin muxing and PHY control. Only the Tegra124 PCIe and SATA functionality is currently implemented, with weak symbols on Tegra114. Tegra20 and Tegra30 also provide weak symbols for these functions so that drivers can use the same API irrespective of which SoC they're being built for. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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6173c45b |
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09-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
power: Add AMS AS3722 PMIC support The AS3722 provides a number of DC/DC converters and LDOs as well as 8 GPIOs. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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0bd4e39d |
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21-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
fdt: remove fdtdec_get_alias_node() function The fdt_path_offset() checks an alias too. fdtdec_get_alias_node(blob, "foo") is equivalent to fdt_path_offset(blob, "foo"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
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effcf067 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add initial video device init for Intel GMA Intel's Graphics Media Accelerator (GMA) is a generic name for a wide range of video devices. Add code to set up the hardware on ivybridge. Part of the init happens in native code, part of it happens in a 16-bit option ROM for those nostalgic for the 1970s. Signed-off-by: Simon Glass <sjg@chromium.org>
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bb80be39 |
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24-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add init for model 206AX CPU Add the setup code for the CPU so that it can be used at full speed. Signed-off-by: Simon Glass <sjg@chromium.org>
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3ac83935 |
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14-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Add SATA init Add code to set up the SATA interfaces on boot. Signed-off-by: Simon Glass <sjg@chromium.org>
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65dd74a6 |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Implement SDRAM init Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in the board directory and the SDRAM SPD information in the device tree. This also needs the Intel Management Engine (me.bin) to work. Binary blobs everywhere: so far we have MRC, ME and microcode. SDRAM init works by setting up various parameters and calling the MRC. This in turn does some sort of magic to work out how much memory there is and the timing parameters to use. It also sets up the DRAM controllers. When the MRC returns, we use the information it provides to map out the available memory in U-Boot. U-Boot normally moves itself to the top of RAM. On x86 the RAM is not generally contiguous, and anyway some RAM may be above 4GB which doesn't work in 32-bit mode. So we relocate to the top of the largest block of RAM we can find below 4GB. Memory above 4GB is accessible with special functions (see physmem). It would be possible to build U-Boot in 64-bit mode but this wouldn't necessarily provide any more memory, since the largest block is often below 4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit kernels directly so this does not pose a limitation in that area. Also there are probably parts of U-Boot that will not work correctly in 64-bit mode. The MRC is one. There is some work remaining in this area. Since memory init is very slow (over 500ms) it is possible to save the parameters in SPI flash to speed it up next time. Suspend/resume support is not fully implemented, or at least it is not efficient. With this patch, link boots to a prompt. Signed-off-by: Simon Glass <sjg@chromium.org>
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77f9b1fb |
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12-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Perform Intel microcode update on boot Microcode updates are stored in the device tree. Work through these and apply any that are needed. Signed-off-by: Simon Glass <sjg@chromium.org>
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a9f04d49 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a variable-sized u32 array Sometimes an array can be of variable size up to a maximum. Add a helper function to decode this. Signed-off-by: Simon Glass <sjg@chromium.org>
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26403871 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to decode a named memory region Permit decoding of a named memory region from the device tree. This allows easy run-time configuration of the address of on-chip SRAM, SDRAM, etc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
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f3cc44f9 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Enhance flashmap function to deal with region properties Flash regions can optionally be compressed or hashed. Add the ability to read this information from the flashmap. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Tom Rini <trini@ti.com>
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76489832 |
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23-Oct-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Use the correct return types for fdtdec_decode_region() Use the correct FDT data types for this function. Also add more debugging. Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
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ca42d3f7 |
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10-Oct-2014 |
Simon Glass <sjg@chromium.org> |
x86: dts: Add device tree compatible string for Intel IPC Add this to the table so that it can be recognised. Signed-off-by: Simon Glass <sjg@chromium.org>
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9f85eee7 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add a function to return PCI BDF triplet The fdtdec_pci_get_bdf() function returns the bus, device, function triplet of a PCI device by parsing the "reg" property according to the PCI device tree binding. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
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56f42242 |
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26-Aug-2014 |
Thierry Reding <treding@nvidia.com> |
fdt: Add resource parsing functions Add the fdt_get_resource() and fdt_get_named_resource() functions which can be used to parse resources (memory regions) from an FDT. A helper to compute the size of a region is also provided. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
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aac07d49 |
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04-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: fdt: Add a function to look up a chosen node Within /chosen we may have a node which points to another node, similar to how /aliases works. Add a helper function to do this lookup. Signed-off-by: Simon Glass <sjg@chromium.org>
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9e8f664e |
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05-Sep-2014 |
Vadim Bendebury <vbendeb@chromium.org> |
video: Add driver for Parade PS8625 dP to LVDS bridge The initialization table comes from the "Illustration of I2C command for initialing PS8625" document supplied by Parade. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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45c480c9 |
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05-Sep-2014 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_fimd: Add framework to disable FIMD sysmmu On Exynos5420 and newer versions, the FIMD sysmmus are in "on state" by default. We have to disable them in order to make FIMD DMA work. This patch adds the required framework to exynos_fimd driver, and disables FIMD sysmmu on Exynos5420. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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3234aa4b |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the node offset of an alias This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org>
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5c33c9fd |
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23-Jul-2014 |
Simon Glass <sjg@chromium.org> |
fdt: Add a function to get the alias sequence of a node Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org>
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a9cf6da9 |
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20-May-2014 |
Simon Glass <sjg@chromium.org> |
exynos: Enable the LCD backlight for snow The backlight uses FETs on the TPS65090. Enable this so that the display is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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ac1058fd |
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20-May-2014 |
Tom Wai-Hong Tam <waihong@chromium.org> |
power: Add support for TPS65090 PMU chip. This adds driver support for the TPS65090 PMU. Support includes hooking into the pmic infrastructure so that the pmic commands can be used on the console. The TPS65090 supports the following functionality: - fet enable/disable/querying - getting and setting of charge state Even though it is connected to the pmic infrastructure it does not hook into the pmic charging charging infrastructure. The device tree binding is from Linux, but only a small subset of functionality is supported. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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7d3ca0f8 |
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15-May-2014 |
Jaehoon Chung <jh80.chung@samsung.com> |
ARM: dts: exynos: rename from EXYNOS5_DWMMC to EXYNOS_DWMMC Exynos serise can be supported the dw-mmc controller. So, it's good that used the general prefix as "_EXYNOS_DWMMC". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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7d95f2a3 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
sandbox: Add LCD driver Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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df93d90a |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: sandbox: Add Chrome OS EC emulation Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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006e73b9 |
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27-Feb-2014 |
Simon Glass <sjg@chromium.org> |
cros_ec: Add a function for reading a flash map entry A flash map describes the layout of flash memory in terms of offsets and sizes for each region. Add a function to read a flash map entry from the device tree. Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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3577fe8b |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
drivers:mmc:sdhci: enable support for DT This patch enables support for device tree for sdhci driver. Non DT case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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de461c52 |
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07-Mar-2014 |
Piotr Wilczek <p.wilczek@samsung.com> |
video:mipidsim:fdt: Add DT support for mipi dsim driver This patch enables parsing mipi data from device tree. Non device tree case is still supported. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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a73ca478 |
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24-Jan-2014 |
Stephen Warren <swarren@nvidia.com> |
mmc: tegra: support Tegra124 Tegra124's MMC controller is very similar to earlier SoC generations, and can be supported by the same driver. However, there are some non-backwards-compatible HW differences, and hence a new DT compatible value must be used to describe the HW. This patch updates the driver to support that new compatible value. That said, the HW differences are only relevant when enabling certain high-performance transfer modes. Since the driver is currently very simple and doesn't enable those modes, we don't actually need to address any of these HW differences in the code yet, hence the simple nature of this patch. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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108b85be |
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14-Sep-2013 |
Vivek Gautam <gautam.vivek@samsung.com> |
exynos5: dts: Add COMPAT string data for USB 3.0 PHY and XHCI Adding required compatible string for xHCI host controller as well as USB 3.0 PHY to enable dt support for usb 3.0 on exynos5. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>
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1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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ecbd7e1e |
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29-Apr-2013 |
naveen krishna chatradhi <naveenkrishna.ch@gmail.com> |
fdtdec: Add compatible string for High speed i2c Adds a new COMPAT string exynos5-hsi2c for high speed i2c controller available on exynos5 SoCs from Samsung. Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
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7e44d932 |
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21-Jun-2013 |
Jim Lin <jilin@nvidia.com> |
ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114 Tegra30 and Tegra114 are compatible except PLL parameters. Tested on Tegra30 Cardhu, and Tegra114 Dalmore platforms. All works well. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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713cb680 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: adds cros_ec keyboard driver This patch adds the driver for keyboard that's controlled by ChromeOS EC. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
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88364387 |
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15-May-2013 |
Hung-ying Tyan <tyanh@chromium.org> |
cros: add cros_ec driver This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
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ee1e3c2f |
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24-Jun-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for Serial Add required compatible information for s5p serial driver Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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45a4d4d3 |
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27-Apr-2013 |
Amar <amarendra.xt@samsung.com> |
FDT: Add compatible string for DWMMC Add required compatible information for DWMMC driver. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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ec34fa5e |
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12-Apr-2013 |
Vincent Palatin <vpalatin@chromium.org> |
tpm: Add support for new Infineon I2C TPM (SLB 9645 TT 1.2 I2C) Add support for Infineon's new SLB 9645 TT 1.2 I2C TPMs, which supports clockstretching, combined reads and a bus speed of up to 400khz. The device also has a new device id. This is based on the kernel patch provided by Infineon : https://gerrit.chromium.org/gerrit/42332 Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org>
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f6267998 |
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12-Apr-2013 |
Rong Chang <rongchang@chromium.org> |
tpm: Add Infineon slb9635_i2c TPM driver Add a driver for the I2C TPM from Infineon. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Rong Chang <rongchang@chromium.org> Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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#
1e4706a7 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS5: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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#
d7377b51 |
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21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
EXYNOS: FDT: Add compatible strings for FIMD Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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#
c3bb3c8b |
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16-Mar-2013 |
Allen Martin <amartin@nvidia.com> |
tegra114: fdt: add compatible string for tegra114 SPI ctrl Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
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bb8215f4 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
sf: Enable FDT-based configuration and memory mapping Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org>
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4397a2a8 |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_get_addr_size() to read reg properties It is common to have a "reg = <address size>" property in the FDT. Add a function to handle this, similar to the existing fdtdec_get_addr(); Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f4e4e0b0 |
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04-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra30: mmc: Add Tegra30 SDMMC compatible entry to fdtdec & driver Tegra30 SD/MMC controller differs enough from Tegra20 that it needs its own entry in the compat_names/compat_id tables and in the Tegra MMC driver. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
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c9aa831e |
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20-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: MMC: Add DT support to MMC driver for all T20 boards tegra_mmc_init() now parses the DT info for bus width, WP/CD GPIOs, etc. Tested on Seaboard, fully functional. Tamonten boards (medcom-wide, plutux, and tec) use a different/new dtsi file w/common settings. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Reviewed-by: Stephen Warren <swarren@nvidia.com>
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e32624ef |
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08-Feb-2013 |
Tom Warren <twarren.nvidia@gmail.com> |
Tegra: I2C: Add T114 clock support to tegra_i2c driver T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
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#
618766c0 |
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24-Feb-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos5: FDT: Add TMU device node values Fdt entry for Exynos TMU driver specific pre-defined values used for calibration of current temperature and defining threshold values. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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#
7772bb78 |
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14-Feb-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for MAX98095 Add required compatible information for MAX98095 codec Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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#
b19f5749 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: add SPI SLINK driver Add driver for tegra SPI "SLINK" style driver. This controller is similar to the tegra20 SPI "SFLASH" controller. The difference is that the SLINK controller is a genernal purpose SPI controller and the SFLASH controller is special purpose and can only talk to FLASH devices. In addition there are potentially many instances of an SLINK controller on tegra and only a single instance of SFLASH. Tegra20 is currently ths only version of tegra that instantiates an SFLASH controller. This driver supports basic PIO mode of operation and is configurable (CONFIG_OF_CONTROL) to be driven off devicetree bindings. Up to 4 devices per controller may be attached, although typically only a single chip select line is exposed from tegra per controller so in reality this is usually limited to 1. To enable this driver, use CONFIG_TEGRA_SLINK Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
8f1b46b1 |
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29-Jan-2013 |
Allen Martin <amartin@nvidia.com> |
tegra: spi: add fdt support to tegra SPI SFLASH driver Add support for configuring tegra SPI driver from devicetree. Support is keyed off CONFIG_OF_CONTROL. Add entry in seaboard dts file for spi controller to describe seaboard spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
cd577e2b |
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08-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for PMIC Add required compatible information for PMIC Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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#
6abd1620 |
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07-Jan-2013 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for USB Add required compatible information for USB Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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5d50659d |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for SPI Add required compatible information for SPI driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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72dbff12 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
EXYNOS5: FDT: Add compatible strings for sound Add required compatible information for sound driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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#
c34253d1 |
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26-Dec-2012 |
Rajeshwari Shinde <rajeshwari.s@samsung.com> |
FDT: Add compatible string for I2C Add required compatible information for I2C driver. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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#
cc9fe33a |
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10-Dec-2012 |
Hatim RV <hatim.rv@samsung.com> |
fdt: exynos5: Add DT node definition for SROM and SMSC9215 Add the compatibility string and constant for the ethernet driver so the device tree parsing code can recognize it. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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87540de3 |
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17-Oct-2012 |
Wei Ni <wni@nvidia.com> |
tegra: Add SOC support for display/lcd Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com>
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e1ae0d1f |
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17-Oct-2012 |
Simon Glass <sjg@chromium.org> |
tegra: Add support for PWM The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
202ff753 |
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25-Oct-2012 |
Sean Paul <seanpaul@chromium.org> |
fdt: Add polarity-aware gpio functions to fdtdec Add get and set gpio functions to fdtdec that take into account the polarity field in fdtdec_gpio_state.flags. Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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aadef0a1 |
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25-Oct-2012 |
Che-Liang Chiou <clchiou@chromium.org> |
fdt: Add fdtdec_get_uint64 to decode a 64-bit value from a property It decodes a 64-bit value from a property that is at least 8 bytes long. Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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#
79289c0b |
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25-Oct-2012 |
Gabe Black <gabeblack@chromium.org> |
fdt: Add function to read boolean property Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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#
7cde397b |
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12-Nov-2012 |
Gerald Van Baren <gvb@unssw.com> |
fdt: Export fdtdec_lookup() and fix the name The name of this function is not consistent, so fix it, and export the function for external use. Signed-off-by: Simon Glass <sjg@chromium.org>
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5921f6a2 |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function for decoding multiple gpios globally available Samsung's SDHCI bindings require multiple gpios to be parsed and configured at a time. Export the already available fdtdec_decode_gpios for this purpose. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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f20c4619 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_decode_region() to decode memory region A memory region has a start and a size and is often specified in a node by a 'reg' property. Add a function to decode this information from the fdt. Signed-off-by: Simon Glass <sjg@chromium.org>
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332ab0d5 |
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25-Oct-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to get a config string from device tree Add a function to look up a configuration string such as board name and returns its value. We look in the "/config" node for this. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
09258f1e |
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25-Oct-2012 |
Abhilash Kesavan <a.kesavan@samsung.com> |
fdt: Add function to get config int from device tree Add a function to look up a configuration item such as machine id and return its value. Note: The code has been taken as is from the Chromium u-boot development tree and needs Simon Glass' sign-off. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org>
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5bfa78db |
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11-Jul-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add header guard to fdtdec.h This makes it easier to include this header from other headers. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
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312693c3 |
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29-Jul-2012 |
Jim Lin <jilin@nvidia.com> |
tegra: nand: Add Tegra NAND driver A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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00a2749d |
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31-Aug-2012 |
Allen Martin <amartin@nvidia.com> |
tegra20: rename tegra2 -> tegra20 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
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6642a681 |
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17-Apr-2012 |
Rakesh Iyer <riyer@nvidia.com> |
tegra: Add tegra keyboard driver Add support for internal matrix keyboard controller for Nvidia Tegra platforms. This driver uses the fdt decode function to obtain its key codes. Support for the Ctrl modifier is provided. The left and right ctrl keys are dealt with in the same way. This uses the new keyboard input library (drivers/input/input.c) to decode keys and handle most of the common input logic. The new key matrix library is also used to decode (row, column) key positions into key codes. The intent is to make this driver purely about dealing with the hardware. Key detection before the driver is loaded is supported. This key will be picked up when the keyboard driver is initialized. Modified by Bernie Thompson <bhthompson@chromium.org> and Simon Glass <sjg@chromium.org> for device tree, input layer, key matrix and various other things. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
bed4d892 |
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17-Apr-2012 |
Anton Staff <robotboy@chromium.org> |
fdt: Add fdtdec functions to read byte array Sometimes we don't need a full cell for each value. This provides a simple function to read a byte array, both with and without copying it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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0e35ad05 |
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02-Apr-2012 |
Jimmy Zhang <jimmzhang@nvidia.com> |
tegra: Add EMC support for optimal memory timings Add support for setting up the memory controller parameters. Boards can set up an appropriate table in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
3ddecfc7 |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to return next compatible subnode We need to iterate through subnodes of a parent, looking only at compatible nodes. Add a utility function to do this for us. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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96875e7d |
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02-Apr-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to locate an array in the device tree fdtdec_locate_array() locates an integer array but does not copy it. This saves the caller having to allocated wasted space. Access to array elements should be through the fdt32_to_cpu() macro. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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#
96a78ac0 |
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06-Mar-2012 |
Yen Lin <yelin@nvidia.com> |
tegra: i2c: Add I2C driver Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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c6782270 |
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03-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add function to allow aliases to refer to multiple nodes Some devices can deal with multiple compatible properties. The devices need to know which nodes to bind to which features. For example an I2C driver which supports two different controller types will want to know which type it is dealing with in each case. The new fdtdec_add_aliases_for_id() function deals with this by allowing the driver to search for additional compatible nodes for a different ID. It can then detect the new ones and perform appropriate processing. Another option considered was to return a tuple (node offset, compat id) and have the function be passed a list of compatible IDs. This is more overhead for the common case though. We may add such a function later if more drivers in U-Boot require it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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9a263e55 |
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28-Mar-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Avoid early panic() when there is no FDT present CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call panic() before the console is set up since the message does not appear, and we get a silent failure. Remove the panic from fdtdec_check_fdt() and provide a new function to prepare the fdt for use. This will be called after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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87f938c9 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
tegra: usb: Add support for Tegra USB peripheral This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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ed3ee5cd |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add basic support for decoding GPIO definitions This adds some support into fdtdec for reading GPIO definitions from the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO is of the form: gpio-function-name = <phandle gpio_num flags>; where: phandle is a pointer to the GPIO node gpio_num is the number of the GPIO (0 to 223) flags is a flag, as follows: bit meaning 0 0=polarity normal, 1=active low (inverted) An example is: enable-propounder-gpios = <&gpio 43 0>; which means that GPIO 43 is used to enable the propounder (setting the GPIO high), or that you can detect that the propounder is enabled by checking if the GPIO is high (the fdt does not indicate input/output). Two main functions are provided: fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it into a structure. fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you. Both functions can cope with the property being missing, which is taken to mean that that GPIO function is not available or is not needed. [For reference, from Stephen Warren <swarren@nvidia.com>. It may be that we add this extra complexity later if needed: The correct way to parse such a GPIO property in general is: * Read the first cell. * Find the node referenced by the phandle (the controller). * Ensure property gpio-controller is present in the controller node. * Read property #gpio-cells from the controller node. * Extract #gpio-cells from the original property. * Keep processing more cells from the original property; there may be multiple GPIOs listed. According to the binding documentation in the Linux kernel, Samsung Exynos4 doesn't use this format, and while all other chips do have a flags cell, about 50% of the controllers indicate the cell is unused. ] Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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d17da655 |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add functions to access phandles, arrays and bools Add a function to look up a property which is a phandle in a node, and another to read a fixed-length integer array from an fdt property. Also add a function to read boolean properties, although there is no actual boolean type in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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f88fe2de |
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27-Feb-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Tidy up a few fdtdec problems This fixes five trivial issues in fdtdec.c: 1. fdtdec_get_is_enabled() doesn't really need a default value 2. The fdt must be word-aligned, since otherwise it will fail on ARM 3. The compat_names[] array is missing its first element. This is needed only because the first fdt_compat_id is defined to be invalid. 4. Added a header prototype for fdtdec_next_compatible() 5. Change fdtdec_next_alias() to only increment its 'upto' parameter on success, to make the display error messages in the caller easier. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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a53f4a29 |
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17-Jan-2012 |
Simon Glass <sjg@chromium.org> |
fdt: Add fdtdec_find_aliases() to deal with alias nodes Stephen Warren pointed out that we should use nodes whether or not they have an alias in the /aliases section. The aliases section specifies the order so far as it can, but is not essential. Operating without alisses is useful when the enumerated order of nodes does not matter (admittedly rare in U-Boot). This is considerably more complex, and it is important to keep this complexity out of driver code. This patch creates a function fdtdec_find_aliases() which returns an ordered list of node offsets for a particular compatible ID, taking account of alias nodes. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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b5220bc6 |
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24-Oct-2011 |
Simon Glass <sjg@chromium.org> |
fdt: add decode helper library This library provides useful functions to drivers which want to use the fdt to control their operation. Functions are provided to: - look up and enumerate a device type (for example assigning i2c bus 0, i2c bus 1, etc.) - decode basic types from the fdt, like addresses and integers While this library is not strictly necessary, it helps to minimise the changes to a driver, in order to make it work under fdt control. Less code is required, and so the barrier to switch drivers over is lower. Additional functions to read arrays and GPIOs could be made available here also. Signed-off-by: Simon Glass <sjg@chromium.org>
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