#
eda2c873 |
|
11-Mar-2024 |
Quentin Schulz <quentin.schulz@theobroma-systems.com> |
rockchip: migrate hardware.h inclusion into appropriate files hardware.h is only defining macros which are "wrappers" around writel(). writel() is however not available in hardware.h, <asm/io.h> needs to be included. This means in order to use the wrappers in hardware.h, one also needs to include the <asm/io.h> header. However, this cannot be done currently because hardware.h is included in include/configs files, which are implicitly included by every code file by default, which makes the compilation of arch/arm/cpu/armv8/u-boot.lds fail because ALIGN (the ARM assembly directive) got redefined by some of the include files coming from <asm.io.h>. Because nothing in the include/configs file actually use hardware.h, let's remove the inclusion of hardware.h from the include/configs files and explicitly add it wherever it is required. This prepares for the next commit where <asm/io.h> will be included in hardware.h. Cc: Quentin Schulz <foss+uboot@0leil.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> |
#
7755dc58 |
|
23-Apr-2023 |
Simon Glass <sjg@chromium.org> |
rockchip: Move to standard boot Drop the distro-boot scripts and use standard boot instead. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Jonas Karlman <jonas@kwiboo.se> |
#
7b5f75cf |
|
04-Dec-2022 |
Tom Rini <trini@konsulko.com> |
global: Migrate CONFIG_IRAM_BASE to CFG Perform a simple rename of CONFIG_IRAM_BASE to CFG_IRAM_BASE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
0613c36a |
|
04-Dec-2022 |
Tom Rini <trini@konsulko.com> |
global: Migrate CONFIG_EXTRA_ENV_SETTINGS to CFG Perform a simple rename of CONFIG_EXTRA_ENV_SETTINGS to CFG_EXTRA_ENV_SETTINGS Signed-off-by: Tom Rini <trini@konsulko.com> |
#
aa6e94de |
|
16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c45568cc |
|
25-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_BOOTM_LEN to Kconfig This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc(). Cc: Soeren Moch <smoch@web.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
910feb50 |
|
10-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Globally remove most CONFIG_SPL_BUILD tests from config headers With the exception of how PowerPC handles SPL and TPL (which has its own issues), we cannot safely hide options under CONFIG_SPL_BUILD. Largely remove the places that have this test today. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6600b355 |
|
27-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_BSS_START_ADDR to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_START_ADDR Signed-off-by: Tom Rini <trini@konsulko.com> |
#
f113d7d3 |
|
26-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_STACK to Kconfig This converts the following to Kconfig: CONFIG_SPL_STACK Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eaf6ea6a |
|
24-May-2022 |
Tom Rini <trini@konsulko.com> |
Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h - Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR - Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack pointer directly, otherwise we use the common calculation. - On some platforms that were using the standard calculation but did not set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them. - On a small number of platforms that were not subtracting GENERATED_GBL_DATA_SIZE do so now via the standard calculation. - CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most board config header files. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
9b5f9aeb |
|
19-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_MAX_SIZE CONFIG_SPL_MAX_FOOTPRINT Note that the da850evm platforms were violating the "only use one" rule here, and so now hard-code their BSS limit. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
ca8a329a |
|
16-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_PAD_TO et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE CONFIG_TPL_PAD_TO CONFIG_TPL_MAX_SIZE Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the existing places. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d31466b3 |
|
11-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_CBSIZE to Kconfig This converts the following to Kconfig: CONFIG_SYS_CBSIZE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c5b9bf55 |
|
13-Apr-2022 |
Peng Fan <peng.fan@nxp.com> |
include/configs: drop COUNTER_FREQUENCY Since we have CONFIG_COUNTER_FREQUENCY enabled, no need COUNTER_FREQUENCY Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
54562045 |
|
09-Apr-2022 |
Johan Jonker <jbx6244@gmail.com> |
rockchip: move ROCKCHIP_STIMER_BASE to Kconfig Move ROCKCHIP_STIMER_BASE to Kconfig. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a2ac2b96 |
|
27-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
ab92b38a |
|
26-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
49c8ef0e |
|
23-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_LOAD_ADDR to Kconfig Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
e436c499 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so that regular kernel images can get loaded without problems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a0621445 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB behind the area where we load u-boot to, which depending on u-boot size may overlap at some point. So for safety just pick the same value rk3399 has and set CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com> |
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion] |
#
86cf1c82 |
|
16-Aug-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_NR_DRAM_BANKS We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a2a5053a |
|
25-May-2018 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: utilize CONFIG_DEFAULT_FDT_FILE Currently the fdtfile environment variable is set to CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree source. The OS can use a different filename and Kconfig gives us the ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE. This also gives user configuring U-Boot via menuconfig the behaviour someone would expect. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
75670c81 |
|
05-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SPL_FRAMEWORK Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the current set of options we have in Kconfig. We will need to have some options available for SPL and !SPL_FRAMEWORK so this is important. In a few cases we re-order existing options so that we have less escapes from the SPL_FRAMEWORK guard. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
278b90ce |
|
02-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SYS_TEXT_BASE On the NIOS2 and Xtensa architectures, we do not have CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current values into the defconfig and removing them from the headers. I did not attempt to add more default values in and for now will leave that to maintainers. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e3e842f1 |
|
06-Oct-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: configs: use rockchip-common.h for rk3368 rockchip-common.h already defines values that are missing from rk3368_common.h For example BOOT_TARGET_DEVICES was defined empty and therefore distroboot had no boot targets. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
ffaefb88 |
|
04-Sep-2017 |
Andy Yan <andy.yan@rock-chips.com> |
rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1f20fc53 |
|
23-Aug-2017 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
include/configs: drop default definitions of CONFIG_SYS_MAXARGS Now that include/config_fallbacks.h define a sane fallback for CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all configurations that were using the default value. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5aa49af3 |
|
28-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d9d1242b |
|
02-Aug-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368 Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1c787402 |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h To build TPL and SPL stages for the RK3368, we will also need to enable the SPL_FRAMEWORK. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c61177aa |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: add memory layout for TPL and SPL For the RK3368, we use a multi-stage boot-process consisting of the following: 1. TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it) 2. SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot) 3. ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world 4. full U-Boot TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses. This commit sets up the configuration to run: - TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered) - SPL from DRAM at 0x0 - U-Boot from DRAM at 0x200000 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e78b04f9 |
|
22-Jun-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: define COUNTER_FREQUENCY to 24MHz The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0. This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0. If the counter-frequency is not correctly set up, the calculation of delays using the ARMv8 generic timer can not work correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6d1970fa |
|
23-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common |
#
37a0c600 |
|
15-May-2017 |
Andreas Färber <afaerber@suse.de> |
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7755dc58 |
|
23-Apr-2023 |
Simon Glass <sjg@chromium.org> |
rockchip: Move to standard boot Drop the distro-boot scripts and use standard boot instead. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Jonas Karlman <jonas@kwiboo.se> |
#
7b5f75cf |
|
04-Dec-2022 |
Tom Rini <trini@konsulko.com> |
global: Migrate CONFIG_IRAM_BASE to CFG Perform a simple rename of CONFIG_IRAM_BASE to CFG_IRAM_BASE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
0613c36a |
|
04-Dec-2022 |
Tom Rini <trini@konsulko.com> |
global: Migrate CONFIG_EXTRA_ENV_SETTINGS to CFG Perform a simple rename of CONFIG_EXTRA_ENV_SETTINGS to CFG_EXTRA_ENV_SETTINGS Signed-off-by: Tom Rini <trini@konsulko.com> |
#
aa6e94de |
|
16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c45568cc |
|
25-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_BOOTM_LEN to Kconfig This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc(). Cc: Soeren Moch <smoch@web.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
910feb50 |
|
10-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Globally remove most CONFIG_SPL_BUILD tests from config headers With the exception of how PowerPC handles SPL and TPL (which has its own issues), we cannot safely hide options under CONFIG_SPL_BUILD. Largely remove the places that have this test today. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6600b355 |
|
27-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_BSS_START_ADDR to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_START_ADDR Signed-off-by: Tom Rini <trini@konsulko.com> |
#
f113d7d3 |
|
26-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_STACK to Kconfig This converts the following to Kconfig: CONFIG_SPL_STACK Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eaf6ea6a |
|
24-May-2022 |
Tom Rini <trini@konsulko.com> |
Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h - Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR - Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack pointer directly, otherwise we use the common calculation. - On some platforms that were using the standard calculation but did not set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them. - On a small number of platforms that were not subtracting GENERATED_GBL_DATA_SIZE do so now via the standard calculation. - CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most board config header files. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
9b5f9aeb |
|
19-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_MAX_SIZE CONFIG_SPL_MAX_FOOTPRINT Note that the da850evm platforms were violating the "only use one" rule here, and so now hard-code their BSS limit. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
ca8a329a |
|
16-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_PAD_TO et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE CONFIG_TPL_PAD_TO CONFIG_TPL_MAX_SIZE Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the existing places. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d31466b3 |
|
11-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_CBSIZE to Kconfig This converts the following to Kconfig: CONFIG_SYS_CBSIZE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c5b9bf55 |
|
13-Apr-2022 |
Peng Fan <peng.fan@nxp.com> |
include/configs: drop COUNTER_FREQUENCY Since we have CONFIG_COUNTER_FREQUENCY enabled, no need COUNTER_FREQUENCY Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
54562045 |
|
09-Apr-2022 |
Johan Jonker <jbx6244@gmail.com> |
rockchip: move ROCKCHIP_STIMER_BASE to Kconfig Move ROCKCHIP_STIMER_BASE to Kconfig. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a2ac2b96 |
|
27-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
ab92b38a |
|
26-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
49c8ef0e |
|
23-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_LOAD_ADDR to Kconfig Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
e436c499 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so that regular kernel images can get loaded without problems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a0621445 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB behind the area where we load u-boot to, which depending on u-boot size may overlap at some point. So for safety just pick the same value rk3399 has and set CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com> |
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion] |
#
86cf1c82 |
|
16-Aug-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_NR_DRAM_BANKS We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a2a5053a |
|
25-May-2018 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: utilize CONFIG_DEFAULT_FDT_FILE Currently the fdtfile environment variable is set to CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree source. The OS can use a different filename and Kconfig gives us the ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE. This also gives user configuring U-Boot via menuconfig the behaviour someone would expect. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
75670c81 |
|
05-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SPL_FRAMEWORK Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the current set of options we have in Kconfig. We will need to have some options available for SPL and !SPL_FRAMEWORK so this is important. In a few cases we re-order existing options so that we have less escapes from the SPL_FRAMEWORK guard. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
278b90ce |
|
02-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SYS_TEXT_BASE On the NIOS2 and Xtensa architectures, we do not have CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current values into the defconfig and removing them from the headers. I did not attempt to add more default values in and for now will leave that to maintainers. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e3e842f1 |
|
06-Oct-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: configs: use rockchip-common.h for rk3368 rockchip-common.h already defines values that are missing from rk3368_common.h For example BOOT_TARGET_DEVICES was defined empty and therefore distroboot had no boot targets. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
ffaefb88 |
|
04-Sep-2017 |
Andy Yan <andy.yan@rock-chips.com> |
rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1f20fc53 |
|
23-Aug-2017 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
include/configs: drop default definitions of CONFIG_SYS_MAXARGS Now that include/config_fallbacks.h define a sane fallback for CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all configurations that were using the default value. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5aa49af3 |
|
28-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d9d1242b |
|
02-Aug-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368 Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1c787402 |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h To build TPL and SPL stages for the RK3368, we will also need to enable the SPL_FRAMEWORK. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c61177aa |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: add memory layout for TPL and SPL For the RK3368, we use a multi-stage boot-process consisting of the following: 1. TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it) 2. SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot) 3. ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world 4. full U-Boot TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses. This commit sets up the configuration to run: - TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered) - SPL from DRAM at 0x0 - U-Boot from DRAM at 0x200000 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e78b04f9 |
|
22-Jun-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: define COUNTER_FREQUENCY to 24MHz The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0. This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0. If the counter-frequency is not correctly set up, the calculation of delays using the ARMv8 generic timer can not work correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6d1970fa |
|
23-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common |
#
37a0c600 |
|
15-May-2017 |
Andreas Färber <afaerber@suse.de> |
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
7b5f75cf |
|
04-Dec-2022 |
Tom Rini <trini@konsulko.com> |
global: Migrate CONFIG_IRAM_BASE to CFG Perform a simple rename of CONFIG_IRAM_BASE to CFG_IRAM_BASE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
0613c36a |
|
04-Dec-2022 |
Tom Rini <trini@konsulko.com> |
global: Migrate CONFIG_EXTRA_ENV_SETTINGS to CFG Perform a simple rename of CONFIG_EXTRA_ENV_SETTINGS to CFG_EXTRA_ENV_SETTINGS Signed-off-by: Tom Rini <trini@konsulko.com> |
#
aa6e94de |
|
16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c45568cc |
|
25-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_BOOTM_LEN to Kconfig This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc(). Cc: Soeren Moch <smoch@web.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
910feb50 |
|
10-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Globally remove most CONFIG_SPL_BUILD tests from config headers With the exception of how PowerPC handles SPL and TPL (which has its own issues), we cannot safely hide options under CONFIG_SPL_BUILD. Largely remove the places that have this test today. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6600b355 |
|
27-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_BSS_START_ADDR to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_START_ADDR Signed-off-by: Tom Rini <trini@konsulko.com> |
#
f113d7d3 |
|
26-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_STACK to Kconfig This converts the following to Kconfig: CONFIG_SPL_STACK Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eaf6ea6a |
|
24-May-2022 |
Tom Rini <trini@konsulko.com> |
Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h - Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR - Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack pointer directly, otherwise we use the common calculation. - On some platforms that were using the standard calculation but did not set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them. - On a small number of platforms that were not subtracting GENERATED_GBL_DATA_SIZE do so now via the standard calculation. - CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most board config header files. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
9b5f9aeb |
|
19-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_MAX_SIZE CONFIG_SPL_MAX_FOOTPRINT Note that the da850evm platforms were violating the "only use one" rule here, and so now hard-code their BSS limit. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
ca8a329a |
|
16-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_PAD_TO et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE CONFIG_TPL_PAD_TO CONFIG_TPL_MAX_SIZE Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the existing places. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d31466b3 |
|
11-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_CBSIZE to Kconfig This converts the following to Kconfig: CONFIG_SYS_CBSIZE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c5b9bf55 |
|
13-Apr-2022 |
Peng Fan <peng.fan@nxp.com> |
include/configs: drop COUNTER_FREQUENCY Since we have CONFIG_COUNTER_FREQUENCY enabled, no need COUNTER_FREQUENCY Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
54562045 |
|
09-Apr-2022 |
Johan Jonker <jbx6244@gmail.com> |
rockchip: move ROCKCHIP_STIMER_BASE to Kconfig Move ROCKCHIP_STIMER_BASE to Kconfig. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a2ac2b96 |
|
27-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
ab92b38a |
|
26-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
49c8ef0e |
|
23-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_LOAD_ADDR to Kconfig Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
e436c499 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so that regular kernel images can get loaded without problems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a0621445 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB behind the area where we load u-boot to, which depending on u-boot size may overlap at some point. So for safety just pick the same value rk3399 has and set CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com> |
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion] |
#
86cf1c82 |
|
16-Aug-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_NR_DRAM_BANKS We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a2a5053a |
|
25-May-2018 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: utilize CONFIG_DEFAULT_FDT_FILE Currently the fdtfile environment variable is set to CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree source. The OS can use a different filename and Kconfig gives us the ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE. This also gives user configuring U-Boot via menuconfig the behaviour someone would expect. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
75670c81 |
|
05-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SPL_FRAMEWORK Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the current set of options we have in Kconfig. We will need to have some options available for SPL and !SPL_FRAMEWORK so this is important. In a few cases we re-order existing options so that we have less escapes from the SPL_FRAMEWORK guard. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
278b90ce |
|
02-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SYS_TEXT_BASE On the NIOS2 and Xtensa architectures, we do not have CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current values into the defconfig and removing them from the headers. I did not attempt to add more default values in and for now will leave that to maintainers. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e3e842f1 |
|
06-Oct-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: configs: use rockchip-common.h for rk3368 rockchip-common.h already defines values that are missing from rk3368_common.h For example BOOT_TARGET_DEVICES was defined empty and therefore distroboot had no boot targets. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
ffaefb88 |
|
04-Sep-2017 |
Andy Yan <andy.yan@rock-chips.com> |
rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1f20fc53 |
|
23-Aug-2017 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
include/configs: drop default definitions of CONFIG_SYS_MAXARGS Now that include/config_fallbacks.h define a sane fallback for CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all configurations that were using the default value. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5aa49af3 |
|
28-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d9d1242b |
|
02-Aug-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368 Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1c787402 |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h To build TPL and SPL stages for the RK3368, we will also need to enable the SPL_FRAMEWORK. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c61177aa |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: add memory layout for TPL and SPL For the RK3368, we use a multi-stage boot-process consisting of the following: 1. TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it) 2. SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot) 3. ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world 4. full U-Boot TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses. This commit sets up the configuration to run: - TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered) - SPL from DRAM at 0x0 - U-Boot from DRAM at 0x200000 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e78b04f9 |
|
22-Jun-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: define COUNTER_FREQUENCY to 24MHz The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0. This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0. If the counter-frequency is not correctly set up, the calculation of delays using the ARMv8 generic timer can not work correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6d1970fa |
|
23-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common |
#
37a0c600 |
|
15-May-2017 |
Andreas Färber <afaerber@suse.de> |
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c45568cc |
|
25-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_BOOTM_LEN to Kconfig This converts the following to Kconfig: CONFIG_SYS_BOOTM_LEN As part of this, rework error handling in boot/bootm.c so that we pass the buffer size to handle_decomp_error as CONFIG_SYS_BOOTM_LEN will not be available to host tools but we do know the size that we passed to malloc(). Cc: Soeren Moch <smoch@web.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
910feb50 |
|
10-Jun-2022 |
Tom Rini <trini@konsulko.com> |
Globally remove most CONFIG_SPL_BUILD tests from config headers With the exception of how PowerPC handles SPL and TPL (which has its own issues), we cannot safely hide options under CONFIG_SPL_BUILD. Largely remove the places that have this test today. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6600b355 |
|
27-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_BSS_START_ADDR to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_START_ADDR Signed-off-by: Tom Rini <trini@konsulko.com> |
#
f113d7d3 |
|
26-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_STACK to Kconfig This converts the following to Kconfig: CONFIG_SPL_STACK Signed-off-by: Tom Rini <trini@konsulko.com> |
#
eaf6ea6a |
|
24-May-2022 |
Tom Rini <trini@konsulko.com> |
Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h - Make all users of CUSTOM_SYS_INIT_SP_ADDR reference SYS_INIT_SP_ADDR - Introduce HAS_CUSTOM_SYS_INIT_SP_ADDR to allow for setting the stack pointer directly, otherwise we use the common calculation. - On some platforms that were using the standard calculation but did not set CONFIG_SYS_INIT_RAM_SIZE / CONFIG_SYS_INIT_RAM_ADDR, set them. - On a small number of platforms that were not subtracting GENERATED_GBL_DATA_SIZE do so now via the standard calculation. - CONFIG_SYS_INIT_SP_OFFSET is now widely unused, so remove it from most board config header files. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
9b5f9aeb |
|
19-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_BSS_MAX_SIZE et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_BSS_MAX_SIZE CONFIG_SPL_MAX_FOOTPRINT Note that the da850evm platforms were violating the "only use one" rule here, and so now hard-code their BSS limit. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
ca8a329a |
|
16-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SPL_PAD_TO et al to Kconfig This converts the following to Kconfig: CONFIG_SPL_PAD_TO CONFIG_SPL_MAX_SIZE CONFIG_TPL_PAD_TO CONFIG_TPL_MAX_SIZE Note that we need to make TPL_MAX_SIZE be hex, and so move and convert the existing places. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
d31466b3 |
|
11-May-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_CBSIZE to Kconfig This converts the following to Kconfig: CONFIG_SYS_CBSIZE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c5b9bf55 |
|
13-Apr-2022 |
Peng Fan <peng.fan@nxp.com> |
include/configs: drop COUNTER_FREQUENCY Since we have CONFIG_COUNTER_FREQUENCY enabled, no need COUNTER_FREQUENCY Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
54562045 |
|
09-Apr-2022 |
Johan Jonker <jbx6244@gmail.com> |
rockchip: move ROCKCHIP_STIMER_BASE to Kconfig Move ROCKCHIP_STIMER_BASE to Kconfig. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a2ac2b96 |
|
27-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
ab92b38a |
|
26-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
49c8ef0e |
|
23-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_LOAD_ADDR to Kconfig Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
e436c499 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so that regular kernel images can get loaded without problems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a0621445 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB behind the area where we load u-boot to, which depending on u-boot size may overlap at some point. So for safety just pick the same value rk3399 has and set CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com> |
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion] |
#
86cf1c82 |
|
16-Aug-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_NR_DRAM_BANKS We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a2a5053a |
|
25-May-2018 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: utilize CONFIG_DEFAULT_FDT_FILE Currently the fdtfile environment variable is set to CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree source. The OS can use a different filename and Kconfig gives us the ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE. This also gives user configuring U-Boot via menuconfig the behaviour someone would expect. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
75670c81 |
|
05-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SPL_FRAMEWORK Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the current set of options we have in Kconfig. We will need to have some options available for SPL and !SPL_FRAMEWORK so this is important. In a few cases we re-order existing options so that we have less escapes from the SPL_FRAMEWORK guard. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
278b90ce |
|
02-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SYS_TEXT_BASE On the NIOS2 and Xtensa architectures, we do not have CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current values into the defconfig and removing them from the headers. I did not attempt to add more default values in and for now will leave that to maintainers. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e3e842f1 |
|
06-Oct-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: configs: use rockchip-common.h for rk3368 rockchip-common.h already defines values that are missing from rk3368_common.h For example BOOT_TARGET_DEVICES was defined empty and therefore distroboot had no boot targets. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
ffaefb88 |
|
04-Sep-2017 |
Andy Yan <andy.yan@rock-chips.com> |
rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1f20fc53 |
|
23-Aug-2017 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
include/configs: drop default definitions of CONFIG_SYS_MAXARGS Now that include/config_fallbacks.h define a sane fallback for CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all configurations that were using the default value. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5aa49af3 |
|
28-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d9d1242b |
|
02-Aug-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368 Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1c787402 |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h To build TPL and SPL stages for the RK3368, we will also need to enable the SPL_FRAMEWORK. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c61177aa |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: add memory layout for TPL and SPL For the RK3368, we use a multi-stage boot-process consisting of the following: 1. TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it) 2. SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot) 3. ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world 4. full U-Boot TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses. This commit sets up the configuration to run: - TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered) - SPL from DRAM at 0x0 - U-Boot from DRAM at 0x200000 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e78b04f9 |
|
22-Jun-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: define COUNTER_FREQUENCY to 24MHz The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0. This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0. If the counter-frequency is not correctly set up, the calculation of delays using the ARMv8 generic timer can not work correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6d1970fa |
|
23-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common |
#
37a0c600 |
|
15-May-2017 |
Andreas Färber <afaerber@suse.de> |
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c5b9bf55 |
|
13-Apr-2022 |
Peng Fan <peng.fan@nxp.com> |
include/configs: drop COUNTER_FREQUENCY Since we have CONFIG_COUNTER_FREQUENCY enabled, no need COUNTER_FREQUENCY Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
54562045 |
|
09-Apr-2022 |
Johan Jonker <jbx6244@gmail.com> |
rockchip: move ROCKCHIP_STIMER_BASE to Kconfig Move ROCKCHIP_STIMER_BASE to Kconfig. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a2ac2b96 |
|
27-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
ab92b38a |
|
26-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
49c8ef0e |
|
23-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_LOAD_ADDR to Kconfig Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
e436c499 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so that regular kernel images can get loaded without problems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a0621445 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB behind the area where we load u-boot to, which depending on u-boot size may overlap at some point. So for safety just pick the same value rk3399 has and set CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com> |
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion] |
#
86cf1c82 |
|
16-Aug-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_NR_DRAM_BANKS We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a2a5053a |
|
25-May-2018 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: utilize CONFIG_DEFAULT_FDT_FILE Currently the fdtfile environment variable is set to CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree source. The OS can use a different filename and Kconfig gives us the ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE. This also gives user configuring U-Boot via menuconfig the behaviour someone would expect. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
75670c81 |
|
05-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SPL_FRAMEWORK Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the current set of options we have in Kconfig. We will need to have some options available for SPL and !SPL_FRAMEWORK so this is important. In a few cases we re-order existing options so that we have less escapes from the SPL_FRAMEWORK guard. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
278b90ce |
|
02-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SYS_TEXT_BASE On the NIOS2 and Xtensa architectures, we do not have CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current values into the defconfig and removing them from the headers. I did not attempt to add more default values in and for now will leave that to maintainers. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e3e842f1 |
|
06-Oct-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: configs: use rockchip-common.h for rk3368 rockchip-common.h already defines values that are missing from rk3368_common.h For example BOOT_TARGET_DEVICES was defined empty and therefore distroboot had no boot targets. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
ffaefb88 |
|
04-Sep-2017 |
Andy Yan <andy.yan@rock-chips.com> |
rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1f20fc53 |
|
23-Aug-2017 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
include/configs: drop default definitions of CONFIG_SYS_MAXARGS Now that include/config_fallbacks.h define a sane fallback for CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all configurations that were using the default value. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5aa49af3 |
|
28-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d9d1242b |
|
02-Aug-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368 Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1c787402 |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h To build TPL and SPL stages for the RK3368, we will also need to enable the SPL_FRAMEWORK. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c61177aa |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: add memory layout for TPL and SPL For the RK3368, we use a multi-stage boot-process consisting of the following: 1. TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it) 2. SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot) 3. ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world 4. full U-Boot TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses. This commit sets up the configuration to run: - TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered) - SPL from DRAM at 0x0 - U-Boot from DRAM at 0x200000 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e78b04f9 |
|
22-Jun-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: define COUNTER_FREQUENCY to 24MHz The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0. This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0. If the counter-frequency is not correctly set up, the calculation of delays using the ARMv8 generic timer can not work correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6d1970fa |
|
23-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common |
#
37a0c600 |
|
15-May-2017 |
Andreas Färber <afaerber@suse.de> |
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
54562045 |
|
09-Apr-2022 |
Johan Jonker <jbx6244@gmail.com> |
rockchip: move ROCKCHIP_STIMER_BASE to Kconfig Move ROCKCHIP_STIMER_BASE to Kconfig. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a2ac2b96 |
|
27-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
ab92b38a |
|
26-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
49c8ef0e |
|
23-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_LOAD_ADDR to Kconfig Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
e436c499 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so that regular kernel images can get loaded without problems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a0621445 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB behind the area where we load u-boot to, which depending on u-boot size may overlap at some point. So for safety just pick the same value rk3399 has and set CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com> |
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion] |
#
86cf1c82 |
|
16-Aug-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_NR_DRAM_BANKS We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a2a5053a |
|
25-May-2018 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: utilize CONFIG_DEFAULT_FDT_FILE Currently the fdtfile environment variable is set to CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree source. The OS can use a different filename and Kconfig gives us the ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE. This also gives user configuring U-Boot via menuconfig the behaviour someone would expect. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
75670c81 |
|
05-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SPL_FRAMEWORK Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the current set of options we have in Kconfig. We will need to have some options available for SPL and !SPL_FRAMEWORK so this is important. In a few cases we re-order existing options so that we have less escapes from the SPL_FRAMEWORK guard. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
278b90ce |
|
02-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SYS_TEXT_BASE On the NIOS2 and Xtensa architectures, we do not have CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current values into the defconfig and removing them from the headers. I did not attempt to add more default values in and for now will leave that to maintainers. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e3e842f1 |
|
06-Oct-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: configs: use rockchip-common.h for rk3368 rockchip-common.h already defines values that are missing from rk3368_common.h For example BOOT_TARGET_DEVICES was defined empty and therefore distroboot had no boot targets. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
ffaefb88 |
|
04-Sep-2017 |
Andy Yan <andy.yan@rock-chips.com> |
rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1f20fc53 |
|
23-Aug-2017 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
include/configs: drop default definitions of CONFIG_SYS_MAXARGS Now that include/config_fallbacks.h define a sane fallback for CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all configurations that were using the default value. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5aa49af3 |
|
28-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d9d1242b |
|
02-Aug-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368 Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1c787402 |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h To build TPL and SPL stages for the RK3368, we will also need to enable the SPL_FRAMEWORK. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c61177aa |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: add memory layout for TPL and SPL For the RK3368, we use a multi-stage boot-process consisting of the following: 1. TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it) 2. SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot) 3. ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world 4. full U-Boot TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses. This commit sets up the configuration to run: - TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered) - SPL from DRAM at 0x0 - U-Boot from DRAM at 0x200000 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e78b04f9 |
|
22-Jun-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: define COUNTER_FREQUENCY to 24MHz The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0. This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0. If the counter-frequency is not correctly set up, the calculation of delays using the ARMv8 generic timer can not work correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6d1970fa |
|
23-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common |
#
37a0c600 |
|
15-May-2017 |
Andreas Färber <afaerber@suse.de> |
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
a2ac2b96 |
|
27-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SKIP_LOWLEVEL_INIT et al to Kconfig This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
ab92b38a |
|
26-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
49c8ef0e |
|
23-Aug-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_LOAD_ADDR to Kconfig Now that we have consistent usage, migrate this symbol to Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Rick Chen <rick@andestech.com> |
#
e436c499 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so that regular kernel images can get loaded without problems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a0621445 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB behind the area where we load u-boot to, which depending on u-boot size may overlap at some point. So for safety just pick the same value rk3399 has and set CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com> |
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion] |
#
86cf1c82 |
|
16-Aug-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_NR_DRAM_BANKS We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a2a5053a |
|
25-May-2018 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: utilize CONFIG_DEFAULT_FDT_FILE Currently the fdtfile environment variable is set to CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree source. The OS can use a different filename and Kconfig gives us the ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE. This also gives user configuring U-Boot via menuconfig the behaviour someone would expect. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
75670c81 |
|
05-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SPL_FRAMEWORK Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the current set of options we have in Kconfig. We will need to have some options available for SPL and !SPL_FRAMEWORK so this is important. In a few cases we re-order existing options so that we have less escapes from the SPL_FRAMEWORK guard. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
278b90ce |
|
02-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SYS_TEXT_BASE On the NIOS2 and Xtensa architectures, we do not have CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current values into the defconfig and removing them from the headers. I did not attempt to add more default values in and for now will leave that to maintainers. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e3e842f1 |
|
06-Oct-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: configs: use rockchip-common.h for rk3368 rockchip-common.h already defines values that are missing from rk3368_common.h For example BOOT_TARGET_DEVICES was defined empty and therefore distroboot had no boot targets. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
ffaefb88 |
|
04-Sep-2017 |
Andy Yan <andy.yan@rock-chips.com> |
rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1f20fc53 |
|
23-Aug-2017 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
include/configs: drop default definitions of CONFIG_SYS_MAXARGS Now that include/config_fallbacks.h define a sane fallback for CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all configurations that were using the default value. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5aa49af3 |
|
28-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d9d1242b |
|
02-Aug-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368 Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1c787402 |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h To build TPL and SPL stages for the RK3368, we will also need to enable the SPL_FRAMEWORK. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c61177aa |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: add memory layout for TPL and SPL For the RK3368, we use a multi-stage boot-process consisting of the following: 1. TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it) 2. SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot) 3. ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world 4. full U-Boot TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses. This commit sets up the configuration to run: - TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered) - SPL from DRAM at 0x0 - U-Boot from DRAM at 0x200000 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e78b04f9 |
|
22-Jun-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: define COUNTER_FREQUENCY to 24MHz The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0. This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0. If the counter-frequency is not correctly set up, the calculation of delays using the ARMv8 generic timer can not work correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6d1970fa |
|
23-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common |
#
37a0c600 |
|
15-May-2017 |
Andreas Färber <afaerber@suse.de> |
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e436c499 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: set CONFIG_SYS_BOOTM_LEN to 64MB Mimicing for example the rk3399, set the SYS_BOOTM_LEN to 64MB so that regular kernel images can get loaded without problems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
a0621445 |
|
09-Feb-2021 |
Heiko Stuebner <heiko.stuebner@theobroma-systems.com> |
rockchip: rk3368: adjust CONFIG_SYS_LOAD_ADDR CONFIG_SYS_LOAD_ADDR currently is at 0x00280000 which is only 512KB behind the area where we load u-boot to, which depending on u-boot size may overlap at some point. So for safety just pick the same value rk3399 has and set CONFIG_SYS_LOAD_ADDR to 0x00800800 on rk3368 as well. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com> |
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion] |
#
86cf1c82 |
|
16-Aug-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_NR_DRAM_BANKS We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a2a5053a |
|
25-May-2018 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: utilize CONFIG_DEFAULT_FDT_FILE Currently the fdtfile environment variable is set to CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree source. The OS can use a different filename and Kconfig gives us the ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE. This also gives user configuring U-Boot via menuconfig the behaviour someone would expect. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
75670c81 |
|
05-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SPL_FRAMEWORK Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the current set of options we have in Kconfig. We will need to have some options available for SPL and !SPL_FRAMEWORK so this is important. In a few cases we re-order existing options so that we have less escapes from the SPL_FRAMEWORK guard. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
278b90ce |
|
02-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SYS_TEXT_BASE On the NIOS2 and Xtensa architectures, we do not have CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current values into the defconfig and removing them from the headers. I did not attempt to add more default values in and for now will leave that to maintainers. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e3e842f1 |
|
06-Oct-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: configs: use rockchip-common.h for rk3368 rockchip-common.h already defines values that are missing from rk3368_common.h For example BOOT_TARGET_DEVICES was defined empty and therefore distroboot had no boot targets. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
ffaefb88 |
|
04-Sep-2017 |
Andy Yan <andy.yan@rock-chips.com> |
rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1f20fc53 |
|
23-Aug-2017 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
include/configs: drop default definitions of CONFIG_SYS_MAXARGS Now that include/config_fallbacks.h define a sane fallback for CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all configurations that were using the default value. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
5aa49af3 |
|
28-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
d9d1242b |
|
02-Aug-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368 Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
#
1c787402 |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h To build TPL and SPL stages for the RK3368, we will also need to enable the SPL_FRAMEWORK. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
c61177aa |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: add memory layout for TPL and SPL For the RK3368, we use a multi-stage boot-process consisting of the following: 1. TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it) 2. SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot) 3. ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world 4. full U-Boot TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses. This commit sets up the configuration to run: - TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered) - SPL from DRAM at 0x0 - U-Boot from DRAM at 0x200000 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
e78b04f9 |
|
22-Jun-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: define COUNTER_FREQUENCY to 24MHz The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0. This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0. If the counter-frequency is not correctly set up, the calculation of delays using the ARMv8 generic timer can not work correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6d1970fa |
|
23-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common |
#
37a0c600 |
|
15-May-2017 |
Andreas Färber <afaerber@suse.de> |
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
11af95a0 |
|
16-Jun-2020 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_BAUDRATE to Kconfig This converts the following to Kconfig: CONFIG_BAUDRATE Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
6024467b |
|
18-Oct-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
4d2c5723 |
|
19-Aug-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: Move config SYS_MALLOC_LEN to Kconfig Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
5f246808 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add CONFIG_IRAM_BASE for all SoCs Rockchip SoCs have internal sram for bootrom data area and for sdram init program space. Introduce the base address in case we need to use it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
7a9dd607 |
|
22-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: remove redundant CONFIG_SYS_NS16550_MEM32 The CONFIG_SYS_NS16550_MEM32 already defined in rockchip_common.h, no need to define again in soc level header. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
192445b3 |
|
09-Jul-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk3368: enable stimer for rk3368 Add stimer_init() for spl/tpl so that we able to switch to use arch timer. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
|
#
cd193462 |
|
29-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: px5: update SPL size for spl/tpl Use larger space for load bl31 in SPL Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Andy Yan <andy.yan@rock-chips.com>
|
#
15f09a1a |
|
27-Mar-2019 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: use 'arch-rockchip' as header file path Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
f89d6133 |
|
30-Sep-2018 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
configs: move CONFIG_SPL_TEXT_BASE to Kconfig Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing values. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> [trini: Re-run migration] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2acc24fc |
|
30-Nov-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
Kconfig: Migrate BOUNCE_BUFFER The bounce buffer is used by a few drivers (most of the MMC drivers) to overcome limitations in their respective DMA implementation. This moves the configuration to Kconfig and makes it user-selectable (even though it will be a required feature to make those drivers work): the expected usage is for drivers depending on this to 'select' it unconditionally from their respective Kconfig (see follow-up patches). This commit includes a full migration using moveconfig.py to ensure that each commit compiles. To ensure bisectability we update dependencies of various drivers to now select BOUNCE_BUFFER when needed. [trini: Squash all patches to ensure bisectability] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Otavio Salvador <otavio@ossystems.com.br> [dw_mmc portion] Reviewed-by: Fabio Estevam <festevam@gmail.com> [mxsmmc portion] Reviewed-by: Simon Glass <sjg@chromium.org> [tegra portion]
|
#
86cf1c82 |
|
16-Aug-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_NR_DRAM_BANKS We have the following cases: - CONFIG_NR_DRAM_BANKS was defined, migrate normally - CONFIG_NR_DRAM_BANKS_MAX was defined and then used for CONFIG_NR_DRAM_BANKS after a check, just migrate it over now. - CONFIG_NR_DRAM_BANKS was very oddly defined on p2771-0000-* (to 1024 + 2), set this to 8. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
a2a5053a |
|
25-May-2018 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: utilize CONFIG_DEFAULT_FDT_FILE Currently the fdtfile environment variable is set to CONFIG_DEFAULT_DEVICE_TREE which is іnternally used as U-Boot devicetree source. The OS can use a different filename and Kconfig gives us the ability to select a default devicetree via CONFIG_DEFAULT_FDT_FILE. This also gives user configuring U-Boot via menuconfig the behaviour someone would expect. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Tested-By: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
75670c81 |
|
05-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SPL_FRAMEWORK Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the current set of options we have in Kconfig. We will need to have some options available for SPL and !SPL_FRAMEWORK so this is important. In a few cases we re-order existing options so that we have less escapes from the SPL_FRAMEWORK guard. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
278b90ce |
|
02-Feb-2018 |
Tom Rini <trini@konsulko.com> |
configs: Migrate CONFIG_SYS_TEXT_BASE On the NIOS2 and Xtensa architectures, we do not have CONFIG_SYS_TEXT_BASE set. This is a strict migration of the current values into the defconfig and removing them from the headers. I did not attempt to add more default values in and for now will leave that to maintainers. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
e3e842f1 |
|
06-Oct-2017 |
Klaus Goger <klaus.goger@theobroma-systems.com> |
rockchip: configs: use rockchip-common.h for rk3368 rockchip-common.h already defines values that are missing from rk3368_common.h For example BOOT_TARGET_DEVICES was defined empty and therefore distroboot had no boot targets. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
ffaefb88 |
|
04-Sep-2017 |
Andy Yan <andy.yan@rock-chips.com> |
rockchip: rk3368: add ENV_MEM_LAYOUT to extra env settings Add the ENV_MEM_LAYOUT_SETTINGS to CONFIG_EXTRA_ENV_SETTINGS Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
1f20fc53 |
|
23-Aug-2017 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
include/configs: drop default definitions of CONFIG_SYS_MAXARGS Now that include/config_fallbacks.h define a sane fallback for CONFIG_SYS_MAXARGS, we can drop the definition of this constant in all configurations that were using the default value. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Reviewed-by: Tom Rini <trini@konsulko.com>
|
#
5aa49af3 |
|
28-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
moveconfig: migrate TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE We can finally drop TPL_STACK, TPL_TEXT_BASE and TPL_MAX_SIZE off the whitelist (this time it's really happening!) and migrate the setting (only used on the RK3368-uQ7 so far) into Kconfig. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
d9d1242b |
|
02-Aug-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: Kconfig: preset TPL_LDSCRIPT via Kconfig for the RK3368 Set TPL_LDSCRIPT in Kconfig, so we don't have to pollute our header file. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
#
1c787402 |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: enable SPL_FRAMEWORK in rk3368_common.h To build TPL and SPL stages for the RK3368, we will also need to enable the SPL_FRAMEWORK. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
c61177aa |
|
14-Jul-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: add memory layout for TPL and SPL For the RK3368, we use a multi-stage boot-process consisting of the following: 1. TPL: initalises DRAM, returns to boot-ROM (which then loads the next stage and transfers control to it) 2. SPL: a full-features SPL stage including OF_CONTROL and FIT image loading, which fetches the ATF, DTB and full U-Boot and then transfers control to the ATF (using the BL31 parameter block to indicate the location of BL33/U-Boot) 3. ATF: sets up the secure world and exits to BL33 (i.e. a full U-Boot) in the normal world 4. full U-Boot TPL/SPL and the full U-Boot are built from this tree and need to run from distinct text addresses and with distinct initial stack pointer addresses. This commit sets up the configuration to run: - TPL from the SRAM at 0xff8c0000 (note that the first 0x1000 are reserved for use by the boot-ROM and contain the SP when the TPL is entered) - SPL from DRAM at 0x0 - U-Boot from DRAM at 0x200000 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
e78b04f9 |
|
22-Jun-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
rockchip: rk3368: spl: define COUNTER_FREQUENCY to 24MHz The BootROM of the RK3368 Boot ROM does not initialise cntfrq_el0. This change defines COUNTER_FREQUENCY, which is used by the AArch64 init code in arch/arm/cpu/armv8/start.S to set up cntfrq_el0. If the counter-frequency is not correctly set up, the calculation of delays using the ARMv8 generic timer can not work correctly. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
6d1970fa |
|
23-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: add sdram_common for common functions There are some functions like sdram_size_mb can be re-used for different rockchip SoCs, just put them into common file. Add board_get_usable_ram_top() for ram_top init base on SDRAM_MAX_SIZE. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Added SDRAM_MAX_SIZE definition for RK3036: Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> fixup: 3036 fix for sdram_common
|
#
37a0c600 |
|
15-May-2017 |
Andreas Färber <afaerber@suse.de> |
rockchip: rk3368: Add core start-up code for RK3368 The RK3368 is an octa-core Cortex-A53 SoC from Rockchip. This adds basic support to chain-load U-Boot from Rockchip's miniloader. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|